That's just a vicious rumor isn't it? ...
Have they ever done gate and pin swapping from the board to the schematic in Protel? If it is... it's good news... next question is how well?
Here is an area that is legitimately complained about. The pin swapping is restricted to the FPGA component on a PCB project where that FPGA is defined by a linked FPGA project. So it is limited in its application.
There are certainly plenty of hooks for pin and gate swapping but it is not implemented yet - has been pretty static for some time. There are properties of pins to allow you to define what it can swap with but it is not implemented fully.
So unless you use an FPGA project to define your FPGAs (if any), you will *not* get any benefit from pin swapping in P2004 currently. Hopefully this will change in the future. But you can't assume this feature in any decision making.
I have used the FPGA pin swapping feature once - while developing a reference design for Altium (and, yes, I was paid to do this). It worked well and linked nicely back into the FPGA project. If you are doing this sort of stuff often it may be a bankable feature. There is an automatic optimize function that saves having to manually do all the pin swap that does a reasonable job, in some circumstances. To answer another question that is sort of related - there are some users using the FPGA facilities in P2004. I'd guess there are more playing but not using seriously. (I also think the numbers of people having to design with FPGAs is going to increase and many of these are not going to be comfortable with VHDL/Verilog - and this is exactly the market that Altium are trying to capture - digital designers having to migrate inside the FPGA but not wanting to have to learn to code).
I doubt you could put pin swapping (or gate swapping - but I use gates so rarely these days that this is much less an issue for me) on your reasons for coughing up for the new version.
Ian
Bill Brooks - KG6VVP PCB Design Engineer , C.I.D.+, C.I.I. Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510 e-mail:[EMAIL PROTECTED] http://www.dtwc.com http://pcbwizards.com
-----Original Message----- From: Matt Polak [mailto:[EMAIL PROTECTED] Sent: Tuesday, November 23, 2004 1:20 PM To: Protel EDA Discussion List Subject: [PEDA] Problem updating designators / unique IDs under DXP
My question would be simply: What is the recommended procedure for updating the PCB's components and netlist when gate-swapping between parts in the schematics set under DXP? Are there any hints or gotcha's to watch out for?
By the by, DXP2004 has been touting pin and gate-swapping as part of the new package. Has anyone used it yet who can comment on it being a useful (and working) feature?
Regards, -- M
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