i recently sent a board to a new shop for us
the notes said 'tent smallest vias'
we did that in the gerbers as well
they called and said they can't tent the vias unless they use dry film, but they usually use LPI
i said, 'but we do this all the time!'
they said 'well we can *cover* the vias with LPI but we can't *tent* them'
so i guess there is a possibly significant issue of terminology about this
Dennis Saputelli
_______________________________________________________________________ Integrated Controls, Inc. Tel: 415-647-0480 EXT 107 2851 21st Street Fax: 415-647-3003 San Francisco, CA 94110 www.integratedcontrolsinc.com
Brad Velander wrote:
Adeel, I believe the issue you have mentioned about soldermask thickness variation was in regards to the old thick-film soldermask. Previously thick-film solderemask was not used for SMT assemblies because it's thickness could keep components lifted off their pads. With most thin-film or liquid soldermasks this is not an issue because they are not typically thick enough to cause this problem. The other comments mentioned so far match with my experience/opinion as well.
Sincerely, Brad Velander Senior PCB Designer Northern Airborne Technology 1925 Kirschner Rd., Kelowna, BC, V1Y 4N7. tel (250) 763-2329 ext. 225 fax (250) 762-3374
-----Original Message-----
From: Adeel Malik [mailto:[EMAIL PROTECTED] Sent: Monday, January 10, 2005 5:06 AM
To: [email protected]
Subject: [PEDA] Tenting Phenomenon (Is it riskless)
Hi All, I intend to tent vias under components to prevent them
from shorting the component body. But I have been told that "Solder mask
thickness can vary enough to cause issues. Also tenting could mean that debris in a via hole remains unremoved, and unremovable.". Can someone comment on this whether tenting is safe or not. If not, can I use silk screen layer to cover the exposed vias ?>
Regards, Adeel Malik
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