Hi Rick,
You seem to be correct, the rule is not obeyed when the poly is poured. If you change the via's to pads, Tools, Convert, Selected Vias to Free Pads. Then select Don't 'Pour Over Same Net Objects' in the poly pour, this will work. You might also change the Polygon Connect Style in the Design Rules, Plane dialog. Darren Moore > -----Original Message----- > From: [EMAIL PROTECTED] > [mailto:[EMAIL PROTECTED] On Behalf Of Rick Thompson > > > Hi, > > I'm new to the list and have already searched the archives > (past 5 months) for the answer to my question and can't find it. > > I want to place a copper pour over the entire board on the > 'gnd' net. What I want is for it to not pour directly over > the vias which are direct-connected to the ground plane, but > I want to avoid pouring over the ground traces. I explicitly > routed a track from the bypass capacitor (gnd net) to the > ground pin of a device and I want to keep it that way. My > instinct is to make a polygon connect rule set for no connect > on 'IsTrack' field. It seems that the 'pour over same net' > checkbox setting of the polygon properties overrides this > rule. I do want the pour to still directly connect to the > vias of the same net. What am I missing? > > Rick ____________________________________________________________ You are subscribed to the PEDA discussion forum To Post messages: mailto:[email protected] Unsubscribe and Other Options: http://techservinc.com/mailman/listinfo/peda_techservinc.com Browse or Search Old Archives (2001-2004): http://www.mail-archive.com/[email protected] Browse or Search Current Archives (2004-Current): http://www.mail-archive.com/[email protected]
