Ian,

Thank you paying attention to my question.  

I agree, Protel should get extra features like bus multiplying, bus joint and 
disjoint for dissimilar signals ( like in FPGA design). These are normal 
requirements on a PCB design for medium to large projects. I�ll send a related 
feedback to Altium.

Meanwhile I add a new trick to my multi-channel design Trick List, suggested by 
you: multiple sheet symbols all referencing the same sub-sheet. 

I get good advises from you. Thanks again.

Best regards,
Mirela


> 
> From: Ian Wilson <[EMAIL PROTECTED]>
> Date: 2005/02/21 Mon AM 06:12:21 EST
> To: Protel EDA Discussion List <[email protected]>
> Subject: Re: [PEDA] Multiply a Bus - Multi Channel Design
> 
> On 12:54 AM 18/02/2005, Website Visitor said:
> >Could anyone let me know a valid syntax using REPEAT keyword to multiply a 
> >Bus in a multi channel schematic design (PROTEL 2004)?
> >
> >A "REPEAT (BUS [1..4])" Entry Sheet in Parent will not make vertical 
> >connection with a BUS[1..4] Port on Child Sheet. It generates errors.
> >
> >Mirela
> 
> Sorry for the late post - I don't get here much.
> 
> Mirela, you can't repeat a bus using the REPEAT keyword.  This is a 
> limitation of the multi-channel system in DXP/P2004.  There is no support 
> for a bus of busses which would be required for it to work.  I have been 
> suggesting for a long time now that it would be a useful extension.
> 
> There is a workaround that is OK for a limited number of channels - it is 
> not at all ideal when you have a large number of channels.
> 
> If you place multiple sheet symbols all referencing the same sub-sheet the 
> multi-channel system will detect that it is a multi-channel design and give 
> you the advantages of stuff like copying room formats (to copy the layout 
> of one channel to the other channels) etc.  If you compile the project you 
> will see little tabs along the bottom the schematic (of the replicated 
> sub-sheet) - one for each channel.  You can see an example of this in the 
> PortSwitcher1C reference design - look in the Altium examples.  Have a look 
> at the FPGA_Port.SchDoc and the FPGA_Interconnect.SchDoc files. You can see 
> on the FPGA_Interconnect.SchDoc sheet that there are four sheet symbols all 
> referring to FPGA_Port.SchDoc each with a Designator like FPGA_PortA, 
> FPGA_PortB etc.  If you compile the project you should see four tabs along 
> the bottom of the workspace when you have FPGA_Port.SchDoc active - one for 
> each channel.  Component designators can have the channel index appended to 
> them in a form you control (see the Multi-Channel tab of the Project 
> Options).  The channel index can be controlled by you by giving a unique 
> designator to the sheets (CHA, CHB etc) or by the system itself (I think, 
> but haven't tried for ages) by giving each sheet the same designator.  The 
> downside of letting the system choose is you can't control the indexing - 
> you can't see which sheet is connected to which signals on the upper level 
> sheet.  Pretty critical problem in most cases. This is not a problem with 
> REPEATed sheets as you know from the bus indexing of repeated signals which 
> channel they connect to.  I suggest using designators like A, B, ... or 
> ChA, ChB, etc so the PCB designators don't get too long when the channels 
> are instantiated.
> 
> (On the sheets mentioned, you can see use of some of the nice bus splitter 
> and joiner components.  Unfortunately these only work inside FPGA projects, 
> not PCB projects.  This is another thing I am trying to get changed so we 
> can collect dissimilar signals into busses.  If others support this it 
> might help to post something to the feedback address 
> "[EMAIL PROTECTED]" to increase the pressure.)
> 
> This issue has been gone through in some detail on the dxp forum, there are 
> many hits in the archive.  There are a few multichannel articles on the 
> Protel KB but nothing dealing with repeated busses or sending slices of 
> busses to different sheets.
> 
> All the best,
> Ian Wilson
> 
> 
>  
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