At 27/09/06 23:52, you wrote:
> > Afaik, no. What's the use anyway?
> > This would seem to serve no other purpose than to increase the
> > impedance of the plane (larger holes = less copper)
> > Leo
>
>I think you might have thing backwards, or, misunderstoo what I 
>really want to do.

You're right, I had it backwards. Silly me.
I once had a design that relied on the top and bottom layers for its 
ground plane (it had vias every 150 mils), but after the first 
proto's were EMC tested I quickly added an internal ground plane and 
ended up with a six-layer board.....

>   For example:

Okokok, I understand what you're trying to do. ;)

>snippety-snip

Just an observation: on my designs the measurements you gave are 
considered "humongous" ;)
The only way I can think of to achieve what you want is making the 
via size equal to the hole size (with matching DRC rules of course) 
and manually put the required copper on the layers where needed, a 
sort of DIY padstack...
This will probably result in a) the wanted result and b) a complete 
nightmare if you ever have to change the location of even one of 
those vias. Maybe the nightmare will revert to 'only' a bad dream if 
you create library parts that will do this, but it will remain 
troublesome. Blind vias are no option, I gather....

Good luck, 'for this is no easy task'.
Good night even, I'm off to bed.

Leo Potjewijd
hardware designer

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