Jürgen Keil wrote: > >> Is there a commit to fix, do you know? > >No idea. > >I added your system's specs to defect 12799; >I think it is the first intel non-quad cpu system that >is affected by the speedstep kernel cpu time problem. >--
Yes, the workaround is switching "cpupm" back to "enable poll-mode". _PCT object in ACPI table decides to use MSR(Fixed Hardware) or IO(System IO) method to drive the P-state transition. Reading/writing IO is more expensive(milliseconds) than MSR operations(microseconds) in the kernel. Unfortunately, BIOS is using IO method to drive P-state transition on your board. This is not BIOS's fault, ACPI actually supports both methods. In event mode, We need to drive P-state transition in an asynchronous way instead of directly placing it into dispatcher context. Eric or Bill might have the fix progress information. Thanks, -Aubrey _______________________________________________ perf-discuss mailing list perf-discuss@opensolaris.org
