Yoshio - I agree that we need to resolve the 16/32 bit counter issue. Does Toshiba support a completely different kernel patch from IBM? If Toshiba uses both 16 and 32 bit counters, shouldn't PMU_CELL_NUM_COUNTERS in pfmlib_cell.h somehow reflect that rather than being hard-coded to 8? How does one decide (through libpfm) to use 16 vs 32? The bug in pfm_cell_get_event_code has been fixed and pushed into the repository. Thanks, - d
> -----Original Message----- > From: [EMAIL PROTECTED] [mailto:perfmon2-devel- > [EMAIL PROTECTED] On Behalf Of Yoshio Funayama > Sent: Thursday, June 12, 2008 8:09 PM > To: perfmon2-devel@lists.sourceforge.net > Subject: Re: [perfmon2] perfmon2 on Cell > > Hi, > > I implemented libpfm for Cell which is discussed several days ago. > We need variable size counters because both the eight 16bit counters and > four 32bit counters are used in Toshiba Cell platform. > I think that the discussion about this problem will be required. > > The hard-coded "2" in pfm_cell_get_event_code() is a programming bug. > Thank you for correcting. > > Thanks, > > --Yoshio Funayama > > ------------------------------------------------------------------------- > Check out the new SourceForge.net Marketplace. > It's the best place to buy or sell services for > just about anything Open Source. > http://sourceforge.net/services/buy/index.php > _______________________________________________ > perfmon2-devel mailing list > perfmon2-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/perfmon2-devel ------------------------------------------------------------------------- Check out the new SourceForge.net Marketplace. It's the best place to buy or sell services for just about anything Open Source. http://sourceforge.net/services/buy/index.php _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel
