On Apr 27, 2009, at 16:43 , stephane eranian wrote:

> Hi,
>
>
> On Wed, Apr 22, 2009 at 7:40 AM, Nagy Mostafa  
> <nagy.most...@gmail.com> wrote:
>> Hi,
>> What is the most accurate way to measure trace cache miss rate on  
>> Xeon (dual
>> core) using pfmon? I looked into TC_DELIVER_MODE but it counts the  
>> cycles
>> for each operation mode (Deliver or Build), and it also include  
>> cycle counts
>> for both processors (I am only interested in the one running my  
>> code).
>>
>
> I am afraid that's all there is at your disposal. Note that  
> TC_DELIVER has
> unit-masks to filter which CPU (I assume which hyperthread) you  
> measure.
> If you guarantee the other thread is not running, that should be
> enough, shouldn't it?
> Otherwise you can disable HT.

I believe there is another option.

I count trace cache misses using the BPU_fetch_request event, which
has an event mask bit for counting trace cache lookup misses.

I'm not 100% sure that this will count each and every trace cache miss,
because it depends whether or not the "Branch Predictor unit" always
comes into play when determining the next sequence of instructions
to bring into the pipeline. I'm not sure if it comes into play when it's
just straight-line code (i.e. no jumps).

I'm not using perfmon for this, I program the counters myself using the
perfex tool that comes with the perfctr patch, so I'm not sure if  
perfmon
support this event.

K.



>
>
>
>> thanks,
>> - nagy
>>
>> My cpu info:
>> model name    : Intel(R) Xeon(TM) CPU 2.40GHz
>> flags        : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge  
>> mca cmov
>> pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pebs bts
>>
>> Events available:
>> $ pfmon -l
>> TC_DELIVER_MODE
>> BPU_FETCH_REQUEST
>> ITLB_REFERENCE
>> MEMORY_CANCEL
>> MEMORY_COMPLETE
>> LOAD_PORT_REPLAY
>> STORE_PORT_REPLAY
>> MOB_LOAD_REPLAY
>> PAGE_WALK_TYPE
>> BSQ_CACHE_REFERENCE
>> IOQ_ALLOCATION
>> IOQ_ACTIVE_ENTRIES
>> FSB_DATA_ACTIVITY
>> BSQ_ALLOCATION
>> BSQ_ACTIVE_ENTRIES
>> SSE_INPUT_ASSIST
>> PACKED_SP_UOP
>> PACKED_DP_UOP
>> SCALAR_SP_UOP
>> SCALAR_DP_UOP
>> 64BIT_MMX_UOP
>> 128BIT_MMX_UOP
>> X87_FP_UOP
>> TC_MISC
>> GLOBAL_POWER_EVENTS
>> TC_MS_XFER
>> UOP_QUEUE_WRITES
>> RETIRED_MISPRED_BRANCH_TYPE
>> RETIRED_BRANCH_TYPE
>> RESOURCE_STALL
>> WC_BUFFER
>> B2B_CYCLES
>> BNR
>> SNOOP
>> RESPONSE
>> FRONT_END_EVENT
>> EXECUTION_EVENT
>> REPLAY_EVENT
>> INSTR_RETIRED
>> UOPS_RETIRED
>> UOPS_TYPE
>> BRANCH_RETIRED
>> MISPRED_BRANCH_RETIRED
>> X87_ASSIST
>> MACHINE_CLEAR
>> INSTR_COMPLETED
>>
>>
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-- 

Kenneth Hoste
Paris research group - ELIS - Ghent University, Belgium
email: kenneth.ho...@elis.ugent.be
website: http://www.elis.ugent.be/~kehoste
blog: http://boegel.kejo.be


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