On Fri, Oct 2, 2009 at 2:33 AM, Qingyuan Deng <ddq...@gmail.com> wrote: > Hi all, > > I am not sure if this topic is related to Perfmon2, but I think there should > be some more experienced people familiar with this... > > I am trying to manually program on uncore MSRs to count some events, by > adding some system calls into the kernel to read/write those MSR registers. > > The regular counting works(IA32_PERFEVTSELx and IA32_PMx), however, when I > tried to configure those uncore registers, it seems they do not count > anything, and the uncore_pmcs keep to be 0, whatever how I enable them. Here > is what I did: > > Suppose I want to use the uncore pmc 0 to count UNC_DRAM_OPEN.CH0(Umask: > 0x01, event number: 0x60) > I first set the first bit(EN_PC0) in MSR_UNCORE_PERF_GLOBAL_CTRL(address: > 0x391), then I also set the EN bit in MSR_UNCORE_PERFEVTSEL0(address: > 0x3B0) to be 1, and specify the umask and event select fields, by set the > whole stuff to be 0x00400160. Then I assume this counter starts working, and > I run piece of code. After that, I read the value back from > MSR_UNCORE_PMC0(address: 0x3C0), but I got 0 from this counter. And > actually I tried several uncore events and got all being 0. Did I miss > something or did I did it correctly? > I think you got the MSR address backwards.
The config register MSR_UNCORE_PERFEVTSEL0 is 0x3c0 The counter register MSR_UNCORE_PMC0 is 0x3b0. Note that uncore counters are 40 bits not 64-bit. So they can wraparound. To count beyond 40-bit you will need to install an interrupt vector + interrupt handler and select on which core, the uncore PMU will interrupt. ------------------------------------------------------------------------------ Come build with us! The BlackBerry® Developer Conference in SF, CA is the only developer event you need to attend this year. Jumpstart your developing skills, take BlackBerry mobile applications to market and stay ahead of the curve. Join us from November 9-12, 2009. Register now! http://p.sf.net/sfu/devconf _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel