On Tue, 2009-10-06 at 16:42 +0200, Stephane Eranian wrote: > This patch changes the event to counter assignment logic to take > into account event constraints for Intel P6, Core and Nehalem > processors. There is no contraints on Intel Atom. There are > constraints on Intel Yonah (Core Duo) but they are not provided > in this patch given that this processor is not yet supported by > perf_events.
I don't think there's much missing for that, right? I don't actually have that hardware, so I can't test it. > As a result of the constraints, it is possible for some event groups > to never actually be loaded onto the PMU if they contain two events > which can only be measured on a single counter. That situation can be > detected with the scaling information extracted with read(). Right, that's a pre existing bug in the x86 code (we can create groups larger than the PMU) and should be fixed. Patch looks nice though. ------------------------------------------------------------------------------ Come build with us! The BlackBerry® Developer Conference in SF, CA is the only developer event you need to attend this year. Jumpstart your developing skills, take BlackBerry mobile applications to market and stay ahead of the curve. Join us from November 9-12, 2009. Register now! http://p.sf.net/sfu/devconf _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel
