Thanks very much, Stephane! This is awesome!! I successfully installed the
packages as instructed and can collect the PEBS traces as wanted now ;)
One little thing I have to change to successfully compile the pfmon source--
pfmon/pfmon/smpl_mod/inst_hist_smpl.c<http://perfmon2.cvs.sourceforge.net/viewvc/perfmon2/pfmon/pfmon/smpl_mod/inst_hist_smpl.c?view=log>
--> Initialized set and regs
Thanks!
Carole
On Wed, Oct 28, 2009 at 4:36 AM, stephane eranian <eran...@googlemail.com>wrote:
> Hi,
>
> I am happy to report that I have now uploaded all the code necessary to use
> PEBS on Intel Core, Atom, and Nehalem. That includes PEBS-LL on Nehalem
> which is used to sample where cache misses occur.
>
> What you need:
> - latest libpfm sources from CVS
>
> - latest pfmon sources from CVS
>
> - perfmon2 2.6.30 from GIT
>
> git clone
> git://git.kernel.org/pub/scm/linux/kernel/git/eranian/linux-2.6.git
> Make sure you enabled 'Unified PEBS'
>
>
> This kernel includes a unified PEBS sampling format which supports
> Netburst,
> Core, Atom, and Nehalem. You must insert the module perfmon_pebs_smpl
> (or compile in the code).
>
> Next, to use PEBS, you can simply do:
>
> pfmon --smpl-module=pebs --smpl-compact --with-header
> -einst_retired:any_p \
> --long-smpl-period=2400000 ...
>
> Not all events support PEBS. In --smpl-compact mode, each line
> contains a PEBS
> sample.
>
> To collect cache misses on Nehalem, you can do:
>
> pfmon --smpl-module=pebs-ll -e MEM_INST_RETIRED:LATENCY_ABOVE_THRESHOLD \
> --ld-lat-threshold=4 --long-smpl-periods=2000 --smpl-compact
> --with-header ...
>
> You must use the MEM_INST_RETIRED:LATENCY_ABOVE_THRESHOLD to activate this
> HW feature.
>
> Each line contains a PEBS record, including the cache miss
> information. The ld-lat parameter
> is the minimal threshold for the miss latency. Only misses >=
> threshold are captured. It must
> be at least 4. 4 cycles is the L1D hit latency. For each captured
> miss, you get an instruction addr,
> data addr, miss latency, source of the data (where did it come from,
> refer to Intel documentation).
> It is important to understand that the instruction addr does NOT point
> to the load instruction but
> ALWAYS to the next dynamic instruction, i.e., the whole state is
> recorded at retirement of the load.
>
>
> On Mon, Oct 5, 2009 at 1:55 AM, Carole Wu <cwu...@gmail.com> wrote:
> > Hello,
> >
> > I'd like to collect information about my workload, running on Nehalem,
> using
> > PEBS, so I use the following command.
> >
> >>> pfmon -e MEM_INST_RETIRED:LATENCY_ABOVE_THRESHOLD --ld-lat-threshold=1
> >>> --long-smpl-periods=2000 --short-smpl-periods=200 ./mcf_base inp.in
> >>> load latency threshold not yet supported
> > However, the response seems to suggest that my machine does not currently
> > support PEBS? Is it true, or am I not setting parameters correctly?
> >
> > Any help is greatly appreciated.
> >
> > Carole
> >
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