On Tue, Dec 15, 2009 at 3:10 PM, Jiaqing Du <jiaq...@gmail.com> wrote: > Hi Stephane, > > I found the following comment in your code: > > > pfm_core_restore_pmcs() at perfmon_intel_core.c > > > 488 /* > 489 * must restore DS pointer before restoring PMCs > 490 * as this can potentially reactivate monitoring > 491 */ > 492 if (ctx_arch->ds_area) > 493 wrmsrl(MSR_IA32_DS_AREA, (unsigned long)ctx_arch->ds_area); > 494 > 495 for_each_bit(i, cast_ulp(set->used_pmcs), PFM_CORE_NUM_PMCS) > 496 wrmsrl(pfm_pmu_conf->pmc_desc[i].hw_addr, set->pmcs[i]); > > > What do you mean this can potentially reactivate monitoring? I met > some strange problems when I save and restore PMCs. Although I > disabled performance monitoring by clearing the enable bit in PMD, > still sometimes some PMCs overflowed after I restored them. I'm not > sure if they really overflowed, but at least I saw NMIs occurred > later. So in your comment, do you mean the similar problem? > PMD are data registers, they don't control start/stop. That all handled through the PMC registers.
The comment is about the fact that the PEBS buffer area must be re-installed BEFORE you restore the PMC registers as they may be actively monitoring (enable bit set) and thus they may generate PEBS samples right away. Normally with perfmon, you leave the enable bit set in the PMC and you use pfm_start()/pfm_stop() to activate monitoring. ------------------------------------------------------------------------------ Return on Information: Google Enterprise Search pays you back Get the facts. http://p.sf.net/sfu/google-dev2dev _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel
