On Mon, Mar 22, 2010 at 8:28 PM, Vince Weaver <vweav...@eecs.utk.edu> wrote:
> On Mon, 22 Mar 2010, Marc Brünink wrote:
>>
>> short version: Is it in theory possible to get 100% accurate result for
>> BR_INST_RETIRED:ANY?
>
> which CPU type are you running this on?
>
>> So: Is it possible to get a 100% accurate performance counter result (in
>> theory) (for BR_INST_RETIRED:ANY)? Which are the factors distorting the
>> results? Is it possible to get rid of them completely?
>
> I think it's interrupts again, as with the retired_instruction case.
>
> I ran some tests on a core2 machine using perf on a 2.6.32 core2 machine.
> The test was my "ten_billion" micro-benchmark I was talking about on
> Friday.
>
>  Performance counter stats for './ten_billion':
>
>    10000000514  instructions             #      0.000 IPC
>     4999990511  branches
>              1  page-faults
>
>    1.675311657  seconds time elapsed
>
>
> The expected number of branches for this code is 4,999,989,996.  So
> the overcount is 513, which is almost exactly the same as the extra count
> on retired instructions, which makes it look like the retired branch count
> is also being incremented once each time an interrupt happens.
>
I think that's a plausible explanation. It would be interesting to verify
whether the same behavior also exists on AMD processors.

> Vince
> vweav...@eecs.utk.edu
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