Great observation.
> On core2,
> retired instructions is almost exactly expected+HW_INT_RECV+page_faults
>
>
I think we can remove "almost". I performed the test more than 2000 times
and confirmed that the result is always same.
> On Nehalem:
> retired instructions is Expected+page_faults + a small value
> that's probably hw interrupts, but no counter for that :(
> retired stores is Expected + roughly same value extra as retired
> instructions.
>
>
It's very very sad that we don't have "HW_INT_RCV" event in nehalem.
> For some reason "perf" uses L1D_CACHE_ST:MESI as the retired stores
> counter rather than "MEM_INST_RETIRED.STORES". It's the latter that
> I use in my experiment, the former is off by more, possibly due to
> cache coherence issues.
>
> Most of the other machines I have access to don't have
> retired_loads/retired_stores counts so I can't test on those. I do have
> an atom machine I can test on to.
>
> Vince
>
>
>
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