On Mon, Jun 28, 2010 at 3:48 PM, 黃從自 <boo2c...@gmail.com> wrote: > hi, > following is the illustration for the event "offcore_requests" on I7 > Name : OFFCORE_REQUESTS > Code : 0xb0 > Counters : [ 0 1 2 3 ] > Desc : All offcore requests > Umask-00 : 0x80 : [ANY] : All offcore requests > Umask-01 : 0x08 : [ANY_READ] : Offcore read requests > Umask-02 : 0x10 : [ANY_RFO] : Offcore RFO requests > Umask-03 : 0x01 : [DEMAND_READ_DATA] : Offcore demand data read requests > Umask-04 : 0x04 : [DEMAND_RFO] : Offcore demand RFO requests > Umask-05 : 0x40 : [L1D_WRITEBACK] : Offcore L1 data cache writebacks > PEBS : No > Uncore : No > why there are Umask-05 about offcore L1 data cache writebacks ? > as far as I know, I7's L1 L2 cache are on chip and private per-core, > L3 cache is off-chip and shared by all the core.
The Intel documentation says: S.L1D_WRITEBACK : Counts number of L1D writebacks to the uncore. Keep in mind this is talking about requests not responses. Here requests from L1D that reach uncore L3. > Thank you, > Best regards, > Joe > > > ------------------------------------------------------------------------------ > This SF.net email is sponsored by Sprint > What will you do first with EVO, the first 4G phone? > Visit sprint.com/first -- http://p.sf.net/sfu/sprint-com-first > _______________________________________________ > perfmon2-devel mailing list > perfmon2-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/perfmon2-devel > > ------------------------------------------------------------------------------ This SF.net email is sponsored by Sprint What will you do first with EVO, the first 4G phone? Visit sprint.com/first -- http://p.sf.net/sfu/sprint-com-first _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel
