Hi Stephane, On 09/02/2010 06:58 AM, stephane eranian wrote: > Corey, > > > I have heavily restructured the powerpc support inside libpfm4 > to align it with the way we do things for x86 now. In particular, I wanted > the ability to access every event table even if not running on the > matching HW host. That meant that each PMU model needed to have > its owns pfmlib_pmu_support entry. I made all the changes. I have > tested on x86 (with a little hack) and it seems to work fine. I would > appreciate if you could try on actual HW with the perf_examples. I > could only play with the generic examples (showevtinfo, check_events) > > With the new structure, I can do: > $ showevtinfo > Supported PMU models: > [41, ppc970, "PPC970"] > [42, ppc970mp, "PPC970MP"] > [44, power4, "POWER4"] > [45, power5, "POWER5"] > [46, power5p, "POWER5+"] > [47, power6, "POWER6"] > [48, power7, "POWER7"] > Detected PMU models: > Total events: 2716 available, 0 supported > > > $ check_events power7::pm_nest_4 > Supported PMU models: > [41, ppc970, "PPC970"] > [42, ppc970mp, "PPC970MP"] > [44, power4, "POWER4"] > [45, power5, "POWER5"] > [46, power5p, "POWER5+"] > [47, power6, "POWER6"] > [48, power7, "POWER7"] > Detected PMU models: > Total events: 2716 > Requested Event: power7::pm_nest_4 > Actual Event: power7::PM_NEST_4 > PMU : POWER7 > IDX : 805306368 > Codes : 0x87 > > > Just pull from git.
From all of the commits recently, it looks like you've been very busy with both libpfm and perf_events! Thanks for making the changes to Power arch to support this new structure. I tested the latest code (pulled 5 minutes ago) on a Power5 machine. It built flawlessly, and I tried hardware several events using the task example, and they worked fine. Check events appears to give the correct output as well: % ./check_events Supported PMU models: [41, ppc970, "PPC970"] [42, ppc970mp, "PPC970MP"] [44, power4, "POWER4"] [45, power5, "POWER5"] [46, power5p, "POWER5+"] [47, power6, "POWER6"] [48, power7, "POWER7"] [49, perf, "perf_events generic PMU"] Detected PMU models: [45, power5, "POWER5"] [49, perf, "perf_events generic PMU"] Total events: 2736 Requested Event: PERF_COUNT_HW_CPU_CYCLES Actual Event: perf::PERF_COUNT_HW_CPU_CYCLES PMU : perf_events generic PMU IDX : 822083584 Codes : 0x0 Requested Event: PERF_COUNT_HW_INSTRUCTIONS Actual Event: perf::PERF_COUNT_HW_INSTRUCTIONS PMU : perf_events generic PMU IDX : 822083585 Codes : 0x1 So, it looks good. Let me know if there's anything else you'd like me to try. Thanks again, - Corey ------------------------------------------------------------------------------ This SF.net Dev2Dev email is sponsored by: Show off your parallel programming skills. Enter the Intel(R) Threading Challenge 2010. http://p.sf.net/sfu/intel-thread-sfd _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel