Hi,

I wanted to update people on the progress with libpfm4 and the
support for OS attributes directly thru the API. I now have something
that looks fairly reasonable. It can now handle perf_event event
attributes, such as precise, u, k , sampling period and such.


Now, when you run showevtinfo:

$ showevtinfo -O perf wsm::inst_retired
#-----------------------------
IDX      : 855638034
PMU name : wsm (Intel Westmere (single-socket))
Name     : INST_RETIRED
Equiv    : None
Desc     : Instructions retired (Precise Event)
Code     : 0xc0 (14)
Umask-00 : 0x00 : PMU : [ANY_P] : Instructions Retired (Precise Event) (DEFAULT)
Umask-01 : 0x02 : PMU : [X87] : Retired floating-point operations
(Precise Event)
Umask-02 : 0x04 : PMU : [MMX] : Retired MMX instructions (Precise Event)
Umask-03 : 0x108001 : PMU : [TOTAL_CYCLES] : Alias to ANY_P:c=16:i=1
Modif-00 : 0x02 : PMU : [e] : edge level (boolean)
Modif-01 : 0x03 : PMU : [i] : invert (boolean)
Modif-02 : 0x04 : PMU : [c] : counter-mask in range [0-255] (integer)
Modif-03 : 0x05 : PMU : [t] : measure any thread (boolean)
Modif-04 : 0x00 : perf_event : [u] : monitor at user level (boolean)
Modif-05 : 0x01 : perf_event : [k] : monitor at kernel level (boolean)
Modif-06 : 0x03 : perf_event : [r] : random width [0-63] (integer)
Modif-07 : 0x04 : perf_event : [P] : sampling period (integer)
Modif-08 : 0x05 : perf_event : [F] : sampling frequency (Hz) (integer)
Modif-09 : 0x06 : perf_event : [pp] : precise ip (integer)

You notice that attribute now show a 'source' (PMU, perf_event).
Furthermore, you also see that u, k are under the control of perf_event
and not the PMU layer. You also see the 'pp' attribute because this is a
PEBS event.

If you run the same command saying you only care about what the
raw HW supports:


$ showevtinfo -O none wsm::inst_retired
#-----------------------------
IDX      : 855638034
PMU name : wsm (Intel Westmere (single-socket))
Name     : INST_RETIRED
Equiv    : None
Desc     : Instructions retired (Precise Event)
Code     : 0xc0 (10)
Umask-00 : 0x00 : PMU : [ANY_P] : Instructions Retired (Precise Event) (DEFAULT)
Umask-01 : 0x02 : PMU : [X87] : Retired floating-point operations
(Precise Event)
Umask-02 : 0x04 : PMU : [MMX] : Retired MMX instructions (Precise Event)
Umask-03 : 0x108001 : PMU : [TOTAL_CYCLES] : Alias to ANY_P:c=16:i=1
Modif-00 : 0x00 : PMU : [k] : monitor at priv level 0 (boolean)
Modif-01 : 0x01 : PMU : [u] : monitor at priv level 1, 2, 3 (boolean)
Modif-02 : 0x02 : PMU : [e] : edge level (boolean)
Modif-03 : 0x03 : PMU : [i] : invert (boolean)
Modif-04 : 0x04 : PMU : [c] : counter-mask in range [0-255] (integer)
Modif-05 : 0x05 : PMU : [t] : measure any thread (boolean)

You notice that u, k now appears as controlled by the PMU.
The pp, P, F, attributes are gone.

To support this, I had to adjust the following entry points:

typedef enum {
        PFM_OS_ANY = 0,         /* everything available (for listing) */
        PFM_OS_NONE,            /* only actual PMU */
        PFM_OS_PERF_EVENT,/* actual PMU + perf_events */

        PFM_OS_MAX,
} pfm_os_t;

extern pfm_err_t pfm_get_event_info(int idx, pfm_os_t os,
pfm_event_info_t *output);
extern pfm_err_t pfm_get_event_attr_info(int eidx, int aidx, pfm_os_t
os, pfm_event_attr_info_t *output);


Of course, for perf_event specify entry points, the corresponding
pfm_os_t option
is selected.

You can see what is going (with no change to existing application code) when you
want to encode perf_event specific attributes. For instance, using
Corey's evt2raw
example:

$ LIBPFM_VERBOSE=1 perf_examples/evt2raw wsm::inst_retired:c=1:pp=2:P=20000000
[0x15000c0 event_sel=0xc0 umask=0x0 os=0 usr=0 en=1 int=1 inv=0 edge=0
cnt_mask=1 any=0] INST_RETIRED:ANY_P:e=0:i=0:c=1:t=0
PERF[type=4 val=0x15000c0 e_u=0 e_k=0 e_hv=1 period=20000000 freq=0
precise=2] INST_RETIRED:ANY_P:e=0:i=0:c=1:t=0:u=1:k=1:p=20000000:pp=2
r15000c0

On the command line, I can now set precise mode and the sampling
period. This makes it
easy to write perf_event program as much of the parsing of per-event
options is now provided
by libpfm4.

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