Hi,

On Fri, Mar 18, 2011 at 8:55 AM, 陳韋任 <che...@iis.sinica.edu.tw> wrote:
> Hi, all
>
>  I am interested in the LBR (Last Branch Record), and
> I saw perfmon supports LBR for Intel Core i7.
>
Yes, it does on select processors.

>  http://perfmon2.sourceforge.net/pfmon_intel_corei7.html
>
> How the LBR is used in perfmon? I cannot find anything about
> LBR from the output of `pfmon -l`. Or LBR only can be used
> by using libpfm3?
>
LBR is not an event. It is a HW feature of the PMU that collect
taken branches. It is used in sampling mode. It give you the
last N branches which led to the basic block where your sampling
event occurred.

Use pfmon -h to find out more about pfmon support for LBR.
It is available on Nehalem/Westmere processors primarily.

>  The version of perfmon kernel interface is 2.9, and the one
> of pfmon is 3.8.
>
Please use the latest source code for full LBR support.
Pull libpfm3 from CVS. Pull the latest kernel from the GIT
tree.


>  I also note that there are disscussions about adding LBR
> support into perf_events. Like,
>
>  http://thread.gmane.org/gmane.comp.linux.perfmon2.devel/2026
>
> Does anyone know how it is going? Does libpfm4 support LBR?
>
Perf_events in using LBR internally in support of PEBS (to correct
the off-by-one skid of the PEBS instruction address) but as of
today, it is not yet exposed to users.  But patches have been
proposed.

>  Thanks!
>
> Regards,
> chenwj
>
> --
> Wei-Ren Chen (陳韋任)
> Parallel Processing Lab, Institute of Information Science,
> Academia Sinica, Taiwan (R.O.C.)
> Tel:886-2-2788-3799 #1667
>
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