Corey,
Both patches applied as one.
Thanks.
On Tue, Apr 5, 2011 at 11:29 AM, Corey Ashford
<cjash...@linux.vnet.ibm.com> wrote:
> There was a bug in the script that translates the POWER arch event
> tables to libpfm4 source. The bug caused event descriptions that
> contained commas to be processed improperly, and the result was
> mangled short and long description fields.
>
> This patch fixes those descriptions. The corrected script
> re-processed the original event files and produced new code for
> PPC970, PPC970MP, POWER4, POWER5, POWER5+, and POWER6.
>
> Signed-off-by: Corey Ashford <cjash...@linux.vnet.ibm.com>
> ---
> lib/events/power4_events.h | 12 +++---
> lib/events/power5+_events.h | 20 +++++-----
> lib/events/power5_events.h | 20 +++++-----
> lib/events/power6_events.h | 76
> +++++++++++++++++++++---------------------
> lib/events/ppc970_events.h | 12 +++---
> lib/events/ppc970mp_events.h | 12 +++---
> 6 files changed, 76 insertions(+), 76 deletions(-)
>
> diff --git a/lib/events/power4_events.h b/lib/events/power4_events.h
> index 728c773..90b10a9 100644
> --- a/lib/events/power4_events.h
> +++ b/lib/events/power4_events.h
> @@ -707,8 +707,8 @@ static const pme_power_entry_t power4_pe[] = {
> [ POWER4_PME_PM_FPU0_ALL ] = {
> .pme_name = "PM_FPU0_ALL",
> .pme_code = 0x103,
> - .pme_short_desc = "FPU0 executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU0 executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "This signal is active for one cycle when
> fp0 is executing an add, mult, sub, compare, or fsel kind of instruction.
> This could be fadd*, fmul*, fsub*, fcmp**, fsel where XYZ* means XYZ, XYZs,
> XYZ., XYZs. and XYZ** means XYZu, XYZo",
> },
> [ POWER4_PME_PM_FPU0_FEST ] = {
> .pme_name = "PM_FPU0_FEST",
> @@ -1451,8 +1451,8 @@ static const pme_power_entry_t power4_pe[] = {
> [ POWER4_PME_PM_FPU_ALL ] = {
> .pme_name = "PM_FPU_ALL",
> .pme_code = 0x5100,
> - .pme_short_desc = "FPU executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "This signal is active for one cycle when
> FPU is executing an add, mult, sub, compare, or fsel kind of instruction.
> This could be fadd*, fmul*, fsub*, fcmp**, fsel where XYZ* means XYZ, XYZs,
> XYZ., XYZs. and XYZ** means XYZu, XYZo. Combined Unit 0 + Unit 1",
> },
> [ POWER4_PME_PM_LSU_SRQ_S0_ALLOC ] = {
> .pme_name = "PM_LSU_SRQ_S0_ALLOC",
> @@ -1553,8 +1553,8 @@ static const pme_power_entry_t power4_pe[] = {
> [ POWER4_PME_PM_FPU1_ALL ] = {
> .pme_name = "PM_FPU1_ALL",
> .pme_code = 0x107,
> - .pme_short_desc = "FPU1 executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU1 executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "This signal is active for one cycle when
> fp1 is executing an add, mult, sub, compare, or fsel kind of instruction.
> This could be fadd*, fmul*, fsub*, fcmp**, fsel where XYZ* means XYZ, XYZs,
> XYZ., XYZs. and XYZ** means XYZu, XYZo",
> },
> [ POWER4_PME_PM_FPU1_FSQRT ] = {
> .pme_name = "PM_FPU1_FSQRT",
> diff --git a/lib/events/power5+_events.h b/lib/events/power5+_events.h
> index fd69bb6..e307a23 100644
> --- a/lib/events/power5+_events.h
> +++ b/lib/events/power5+_events.h
> @@ -634,8 +634,8 @@ static const pme_power_entry_t power5p_pe[] = {
> [ POWER5p_PME_PM_BR_PRED_TA ] = {
> .pme_name = "PM_BR_PRED_TA",
> .pme_code = 0x230e3,
> - .pme_short_desc = "A conditional branch was predicted",
> - .pme_long_desc = " target prediction",
> + .pme_short_desc = "A conditional branch was predicted, target
> prediction",
> + .pme_long_desc = "The target address of a branch instruction
> was predicted.",
> },
> [ POWER5p_PME_PM_MRK_DATA_FROM_L375_MOD_CYC ] = {
> .pme_name = "PM_MRK_DATA_FROM_L375_MOD_CYC",
> @@ -1270,8 +1270,8 @@ static const pme_power_entry_t power5p_pe[] = {
> [ POWER5p_PME_PM_FPU1_1FLOP ] = {
> .pme_name = "PM_FPU1_1FLOP",
> .pme_code = 0xc7,
> - .pme_short_desc = "FPU1 executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU1 executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "The floating point unit has executed an
> add, mult, sub, compare, fsel, fneg, fabs, fnabs, fres, or frsqrte kind of
> instruction. These are single FLOP operations.",
> },
> [ POWER5p_PME_PM_FPU_FRSP_FCONV ] = {
> .pme_name = "PM_FPU_FRSP_FCONV",
> @@ -2344,8 +2344,8 @@ static const pme_power_entry_t power5p_pe[] = {
> [ POWER5p_PME_PM_FPU0_1FLOP ] = {
> .pme_name = "PM_FPU0_1FLOP",
> .pme_code = 0xc3,
> - .pme_short_desc = "FPU0 executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU0 executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "The floating point unit has executed an
> add, mult, sub, compare, fsel, fneg, fabs, fnabs, fres, or frsqrte kind of
> instruction. These are single FLOP operations.",
> },
> [ POWER5p_PME_PM_PTEG_FROM_L2 ] = {
> .pme_name = "PM_PTEG_FROM_L2",
> @@ -2812,8 +2812,8 @@ static const pme_power_entry_t power5p_pe[] = {
> [ POWER5p_PME_PM_BR_PRED_CR_TA ] = {
> .pme_name = "PM_BR_PRED_CR_TA",
> .pme_code = 0x423087,
> - .pme_short_desc = "A conditional branch was predicted",
> - .pme_long_desc = " CR and target prediction",
> + .pme_short_desc = "A conditional branch was predicted, CR and
> target prediction",
> + .pme_long_desc = "Both the condition (taken or not taken) and
> the target address of a branch instruction was predicted.",
> },
> [ POWER5p_PME_PM_MRK_LSU0_FLUSH_SRQ ] = {
> .pme_name = "PM_MRK_LSU0_FLUSH_SRQ",
> @@ -2866,8 +2866,8 @@ static const pme_power_entry_t power5p_pe[] = {
> [ POWER5p_PME_PM_BR_PRED_CR ] = {
> .pme_name = "PM_BR_PRED_CR",
> .pme_code = 0x230e2,
> - .pme_short_desc = "A conditional branch was predicted",
> - .pme_long_desc = " CR prediction",
> + .pme_short_desc = "A conditional branch was predicted, CR
> prediction",
> + .pme_long_desc = "A conditional branch instruction was
> predicted as taken or not taken.",
> },
> [ POWER5p_PME_PM_MRK_DATA_FROM_L2 ] = {
> .pme_name = "PM_MRK_DATA_FROM_L2",
> diff --git a/lib/events/power5_events.h b/lib/events/power5_events.h
> index f1a9f88..496742b 100644
> --- a/lib/events/power5_events.h
> +++ b/lib/events/power5_events.h
> @@ -625,8 +625,8 @@ static const pme_power_entry_t power5_pe[] = {
> [ POWER5_PME_PM_BR_PRED_TA ] = {
> .pme_name = "PM_BR_PRED_TA",
> .pme_code = 0x230e3,
> - .pme_short_desc = "A conditional branch was predicted",
> - .pme_long_desc = " target prediction",
> + .pme_short_desc = "A conditional branch was predicted, target
> prediction",
> + .pme_long_desc = "The target address of a branch instruction
> was predicted.",
> },
> [ POWER5_PME_PM_MRK_DATA_FROM_L375_MOD_CYC ] = {
> .pme_name = "PM_MRK_DATA_FROM_L375_MOD_CYC",
> @@ -1249,8 +1249,8 @@ static const pme_power_entry_t power5_pe[] = {
> [ POWER5_PME_PM_FPU1_1FLOP ] = {
> .pme_name = "PM_FPU1_1FLOP",
> .pme_code = 0xc7,
> - .pme_short_desc = "FPU1 executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU1 executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "The floating point unit has executed an
> add, mult, sub, compare, fsel, fneg, fabs, fnabs, fres, or frsqrte kind of
> instruction. These are single FLOP operations.",
> },
> [ POWER5_PME_PM_FPU_FRSP_FCONV ] = {
> .pme_name = "PM_FPU_FRSP_FCONV",
> @@ -2275,8 +2275,8 @@ static const pme_power_entry_t power5_pe[] = {
> [ POWER5_PME_PM_FPU0_1FLOP ] = {
> .pme_name = "PM_FPU0_1FLOP",
> .pme_code = 0xc3,
> - .pme_short_desc = "FPU0 executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU0 executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "The floating point unit has executed an
> add, mult, sub, compare, fsel, fneg, fabs, fnabs, fres, or frsqrte kind of
> instruction. These are single FLOP operations.",
> },
> [ POWER5_PME_PM_MRK_DATA_FROM_L35_SHR_CYC ] = {
> .pme_name = "PM_MRK_DATA_FROM_L35_SHR_CYC",
> @@ -2743,8 +2743,8 @@ static const pme_power_entry_t power5_pe[] = {
> [ POWER5_PME_PM_BR_PRED_CR_TA ] = {
> .pme_name = "PM_BR_PRED_CR_TA",
> .pme_code = 0x423087,
> - .pme_short_desc = "A conditional branch was predicted",
> - .pme_long_desc = " CR and target prediction",
> + .pme_short_desc = "A conditional branch was predicted, CR and
> target prediction",
> + .pme_long_desc = "Both the condition (taken or not taken) and
> the target address of a branch instruction was predicted.",
> },
> [ POWER5_PME_PM_MRK_LSU0_FLUSH_SRQ ] = {
> .pme_name = "PM_MRK_LSU0_FLUSH_SRQ",
> @@ -2797,8 +2797,8 @@ static const pme_power_entry_t power5_pe[] = {
> [ POWER5_PME_PM_BR_PRED_CR ] = {
> .pme_name = "PM_BR_PRED_CR",
> .pme_code = 0x230e2,
> - .pme_short_desc = "A conditional branch was predicted",
> - .pme_long_desc = " CR prediction",
> + .pme_short_desc = "A conditional branch was predicted, CR
> prediction",
> + .pme_long_desc = "A conditional branch instruction was
> predicted as taken or not taken.",
> },
> [ POWER5_PME_PM_MRK_DATA_FROM_L2 ] = {
> .pme_name = "PM_MRK_DATA_FROM_L2",
> diff --git a/lib/events/power6_events.h b/lib/events/power6_events.h
> index 6473475..2465674 100644
> --- a/lib/events/power6_events.h
> +++ b/lib/events/power6_events.h
> @@ -650,8 +650,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_L2_CASTOUT_MOD ] = {
> .pme_name = "PM_L2_CASTOUT_MOD",
> .pme_code = 0x150630,
> - .pme_short_desc = "L2 castouts - Modified (M",
> - .pme_long_desc = " Mu",
> + .pme_short_desc = "L2 castouts - Modified (M, Mu, Me)",
> + .pme_long_desc = "L2 castouts - Modified (M, Mu, Me)",
> },
> [ POWER6_PME_PM_FPU1_ST_FOLDED ] = {
> .pme_name = "PM_FPU1_ST_FOLDED",
> @@ -1034,8 +1034,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_FPU1_1FLOP ] = {
> .pme_name = "PM_FPU1_1FLOP",
> .pme_code = 0xc0088,
> - .pme_short_desc = "FPU1 executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU1 executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "This signal is active for one cycle when
> fp1 is executing an add, mult, sub, compare, or fsel kind of instruction.
> This could be fadd*, fmul*, fsub*, fcmp**, fsel where XYZ* means XYZ, XYZs,
> XYZ., XYZs. and XYZ** means XYZu, XYZo",
> },
> [ POWER6_PME_PM_DATA_FROM_RMEM_CYC ] = {
> .pme_name = "PM_DATA_FROM_RMEM_CYC",
> @@ -1088,8 +1088,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_FAB_RETRY_SYS_PUMP ] = {
> .pme_name = "PM_FAB_RETRY_SYS_PUMP",
> .pme_code = 0x50182,
> - .pme_short_desc = "Retry of a system pump",
> - .pme_long_desc = " locally mastered ",
> + .pme_short_desc = "Retry of a system pump, locally mastered
> ",
> + .pme_long_desc = "Retry of a system pump, locally mastered ",
> },
> [ POWER6_PME_PM_DATA_FROM_LMEM ] = {
> .pme_name = "PM_DATA_FROM_LMEM",
> @@ -1310,8 +1310,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_FAB_SYS_PUMP ] = {
> .pme_name = "PM_FAB_SYS_PUMP",
> .pme_code = 0x50180,
> - .pme_short_desc = "System pump operation",
> - .pme_long_desc = " locally mastered",
> + .pme_short_desc = "System pump operation, locally mastered",
> + .pme_long_desc = "System pump operation, locally mastered",
> },
> [ POWER6_PME_PM_IC_PREF_REQ ] = {
> .pme_name = "PM_IC_PREF_REQ",
> @@ -1544,8 +1544,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_FAB_MMIO ] = {
> .pme_name = "PM_FAB_MMIO",
> .pme_code = 0x50186,
> - .pme_short_desc = "MMIO operation",
> - .pme_long_desc = " locally mastered",
> + .pme_short_desc = "MMIO operation, locally mastered",
> + .pme_long_desc = "MMIO operation, locally mastered",
> },
> [ POWER6_PME_PM_MRK_VMX_SIMPLE_ISSUED ] = {
> .pme_name = "PM_MRK_VMX_SIMPLE_ISSUED",
> @@ -1694,8 +1694,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_FPU0_FLOP ] = {
> .pme_name = "PM_FPU0_FLOP",
> .pme_code = 0xc0086,
> - .pme_short_desc = "FPU0 executed 1FLOP",
> - .pme_long_desc = " FMA",
> + .pme_short_desc = "FPU0 executed 1FLOP, FMA, FSQRT or FDIV
> instruction",
> + .pme_long_desc = "FPU0 executed 1FLOP, FMA, FSQRT or FDIV
> instruction",
> },
> [ POWER6_PME_PM_FPU0_FEST ] = {
> .pme_name = "PM_FPU0_FEST",
> @@ -1934,8 +1934,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_BR_PRED_CR ] = {
> .pme_name = "PM_BR_PRED_CR",
> .pme_code = 0x410a2,
> - .pme_short_desc = "A conditional branch was predicted",
> - .pme_long_desc = " CR prediction",
> + .pme_short_desc = "A conditional branch was predicted, CR
> prediction",
> + .pme_long_desc = "A conditional branch was predicted, CR
> prediction",
> },
> [ POWER6_PME_PM_MRK_LSU0_REJECT_ULD ] = {
> .pme_name = "PM_MRK_LSU0_REJECT_ULD",
> @@ -2054,8 +2054,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_FAB_NODE_PUMP ] = {
> .pme_name = "PM_FAB_NODE_PUMP",
> .pme_code = 0x50188,
> - .pme_short_desc = "Node pump operation",
> - .pme_long_desc = " locally mastered",
> + .pme_short_desc = "Node pump operation, locally mastered",
> + .pme_long_desc = "Node pump operation, locally mastered",
> },
> [ POWER6_PME_PM_VMX_RESULT_SAT_0_1 ] = {
> .pme_name = "PM_VMX_RESULT_SAT_0_1",
> @@ -2102,8 +2102,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_FAB_DCLAIM ] = {
> .pme_name = "PM_FAB_DCLAIM",
> .pme_code = 0x50184,
> - .pme_short_desc = "Dclaim operation",
> - .pme_long_desc = " locally mastered",
> + .pme_short_desc = "Dclaim operation, locally mastered",
> + .pme_long_desc = "Dclaim operation, locally mastered",
> },
> [ POWER6_PME_PM_MEM_DP_CL_WR_LOC ] = {
> .pme_name = "PM_MEM_DP_CL_WR_LOC",
> @@ -2240,8 +2240,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_FAB_DMA ] = {
> .pme_name = "PM_FAB_DMA",
> .pme_code = 0x5018c,
> - .pme_short_desc = "DMA operation",
> - .pme_long_desc = " locally mastered",
> + .pme_short_desc = "DMA operation, locally mastered",
> + .pme_long_desc = "DMA operation, locally mastered",
> },
> [ POWER6_PME_PM_GCT_EMPTY_COUNT ] = {
> .pme_name = "PM_GCT_EMPTY_COUNT",
> @@ -2318,8 +2318,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_L2_CASTOUT_SHR ] = {
> .pme_name = "PM_L2_CASTOUT_SHR",
> .pme_code = 0x250630,
> - .pme_short_desc = "L2 castouts - Shared (T",
> - .pme_long_desc = " Te",
> + .pme_short_desc = "L2 castouts - Shared (T, Te, Si, S)",
> + .pme_long_desc = "L2 castouts - Shared (T, Te, Si, S)",
> },
> [ POWER6_PME_PM_DPU_HELD_STCX_CR ] = {
> .pme_name = "PM_DPU_HELD_STCX_CR",
> @@ -2378,8 +2378,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_DPU_HELD_CR_LOGICAL ] = {
> .pme_name = "PM_DPU_HELD_CR_LOGICAL",
> .pme_code = 0x3008e,
> - .pme_short_desc = "DISP unit held due to CR",
> - .pme_long_desc = " LR or CTR updated by CR logical",
> + .pme_short_desc = "DISP unit held due to CR, LR or CTR
> updated by CR logical, MTCRF, MTLR or MTCTR",
> + .pme_long_desc = "DISP unit held due to CR, LR or CTR updated
> by CR logical, MTCRF, MTLR or MTCTR",
> },
> [ POWER6_PME_PM_THRD_SEL_T0 ] = {
> .pme_name = "PM_THRD_SEL_T0",
> @@ -2456,8 +2456,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_DPU_HELD_LSU_SOPS ] = {
> .pme_name = "PM_DPU_HELD_LSU_SOPS",
> .pme_code = 0x30080,
> - .pme_short_desc = "DISP unit held due to LSU slow ops (sync",
> - .pme_long_desc = " tlbie",
> + .pme_short_desc = "DISP unit held due to LSU slow ops (sync,
> tlbie, stcx)",
> + .pme_long_desc = "DISP unit held due to LSU slow ops (sync,
> tlbie, stcx)",
> },
> [ POWER6_PME_PM_INST_PTEG_2ND_HALF ] = {
> .pme_name = "PM_INST_PTEG_2ND_HALF",
> @@ -2558,8 +2558,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_BR_PRED_LSTACK ] = {
> .pme_name = "PM_BR_PRED_LSTACK",
> .pme_code = 0x410a6,
> - .pme_short_desc = "A conditional branch was predicted",
> - .pme_long_desc = " link stack",
> + .pme_short_desc = "A conditional branch was predicted, link
> stack",
> + .pme_long_desc = "A conditional branch was predicted, link
> stack",
> },
> [ POWER6_PME_PM_GXO_DATA_CYC_BUSY ] = {
> .pme_name = "PM_GXO_DATA_CYC_BUSY",
> @@ -2906,8 +2906,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_FPU_FLOP ] = {
> .pme_name = "PM_FPU_FLOP",
> .pme_code = 0x1c0032,
> - .pme_short_desc = "FPU executed 1FLOP",
> - .pme_long_desc = " FMA",
> + .pme_short_desc = "FPU executed 1FLOP, FMA, FSQRT or FDIV
> instruction",
> + .pme_long_desc = "FPU executed 1FLOP, FMA, FSQRT or FDIV
> instruction",
> },
> [ POWER6_PME_PM_FXU_BUSY ] = {
> .pme_name = "PM_FXU_BUSY",
> @@ -2918,8 +2918,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_FPU1_FLOP ] = {
> .pme_name = "PM_FPU1_FLOP",
> .pme_code = 0xc008e,
> - .pme_short_desc = "FPU1 executed 1FLOP",
> - .pme_long_desc = " FMA",
> + .pme_short_desc = "FPU1 executed 1FLOP, FMA, FSQRT or FDIV
> instruction",
> + .pme_long_desc = "FPU1 executed 1FLOP, FMA, FSQRT or FDIV
> instruction",
> },
> [ POWER6_PME_PM_IC_RELOAD_SHR ] = {
> .pme_name = "PM_IC_RELOAD_SHR",
> @@ -3326,8 +3326,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_FPU0_1FLOP ] = {
> .pme_name = "PM_FPU0_1FLOP",
> .pme_code = 0xc0080,
> - .pme_short_desc = "FPU0 executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU0 executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "This signal is active for one cycle when
> fp0 is executing an add, mult, sub, compare, or fsel kind of instruction.
> This could be fadd*, fmul*, fsub*, fcmp**, fsel where XYZ* means XYZ, XYZs,
> XYZ., XYZs. and XYZ** means XYZu, XYZo",
> },
> [ POWER6_PME_PM_IERAT_MISS_16G ] = {
> .pme_name = "PM_IERAT_MISS_16G",
> @@ -3404,8 +3404,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_FAB_RETRY_NODE_PUMP ] = {
> .pme_name = "PM_FAB_RETRY_NODE_PUMP",
> .pme_code = 0x5018a,
> - .pme_short_desc = "Retry of a node pump",
> - .pme_long_desc = " locally mastered",
> + .pme_short_desc = "Retry of a node pump, locally mastered",
> + .pme_long_desc = "Retry of a node pump, locally mastered",
> },
> [ POWER6_PME_PM_VMX0_INST_ISSUED ] = {
> .pme_name = "PM_VMX0_INST_ISSUED",
> @@ -3590,8 +3590,8 @@ static const pme_power_entry_t power6_pe[] = {
> [ POWER6_PME_PM_DPU_HELD_FXU_SOPS ] = {
> .pme_name = "PM_DPU_HELD_FXU_SOPS",
> .pme_code = 0x30088,
> - .pme_short_desc = "DISP unit held due to FXU slow ops (mtmsr",
> - .pme_long_desc = " scv",
> + .pme_short_desc = "DISP unit held due to FXU slow ops (mtmsr,
> scv, rfscv)",
> + .pme_long_desc = "DISP unit held due to FXU slow ops (mtmsr,
> scv, rfscv)",
> },
> [ POWER6_PME_PM_MRK_FPU0_FIN ] = {
> .pme_name = "PM_MRK_FPU0_FIN",
> diff --git a/lib/events/ppc970_events.h b/lib/events/ppc970_events.h
> index 90bbd75..f28df16 100644
> --- a/lib/events/ppc970_events.h
> +++ b/lib/events/ppc970_events.h
> @@ -588,8 +588,8 @@ static const pme_power_entry_t ppc970_pe[] = {
> [ PPC970_PME_PM_FPU0_ALL ] = {
> .pme_name = "PM_FPU0_ALL",
> .pme_code = 0x103,
> - .pme_short_desc = "FPU0 executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU0 executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "This signal is active for one cycle when
> fp0 is executing an add, mult, sub, compare, or fsel kind of instruction.
> This could be fadd*, fmul*, fsub*, fcmp**, fsel where XYZ* means XYZ, XYZs,
> XYZ., XYZs. and XYZ** means XYZu, XYZo",
> },
> [ PPC970_PME_PM_DATA_TABLEWALK_CYC ] = {
> .pme_name = "PM_DATA_TABLEWALK_CYC",
> @@ -1272,8 +1272,8 @@ static const pme_power_entry_t ppc970_pe[] = {
> [ PPC970_PME_PM_FPU_ALL ] = {
> .pme_name = "PM_FPU_ALL",
> .pme_code = 0x5100,
> - .pme_short_desc = "FPU executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "This signal is active for one cycle when
> FPU is executing an add, mult, sub, compare, or fsel kind of instruction.
> This could be fadd*, fmul*, fsub*, fcmp**, fsel where XYZ* means XYZ, XYZs,
> XYZ., XYZs. and XYZ** means XYZu, XYZo. Combined Unit 0 + Unit 1",
> },
> [ PPC970_PME_PM_LSU_SRQ_S0_ALLOC ] = {
> .pme_name = "PM_LSU_SRQ_S0_ALLOC",
> @@ -1386,8 +1386,8 @@ static const pme_power_entry_t ppc970_pe[] = {
> [ PPC970_PME_PM_FPU1_ALL ] = {
> .pme_name = "PM_FPU1_ALL",
> .pme_code = 0x107,
> - .pme_short_desc = "FPU1 executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU1 executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "This signal is active for one cycle when
> fp1 is executing an add, mult, sub, compare, or fsel kind of instruction.
> This could be fadd*, fmul*, fsub*, fcmp**, fsel where XYZ* means XYZ, XYZs,
> XYZ., XYZs. and XYZ** means XYZu, XYZo",
> },
> [ PPC970_PME_PM_FPU1_FSQRT ] = {
> .pme_name = "PM_FPU1_FSQRT",
> diff --git a/lib/events/ppc970mp_events.h b/lib/events/ppc970mp_events.h
> index a8b5ab0..04f6814 100644
> --- a/lib/events/ppc970mp_events.h
> +++ b/lib/events/ppc970mp_events.h
> @@ -639,8 +639,8 @@ static const pme_power_entry_t ppc970mp_pe[] = {
> [ PPC970MP_PME_PM_FPU0_ALL ] = {
> .pme_name = "PM_FPU0_ALL",
> .pme_code = 0x103,
> - .pme_short_desc = "FPU0 executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU0 executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "This signal is active for one cycle when
> fp0 is executing an add, mult, sub, compare, or fsel kind of instruction.
> This could be fadd*, fmul*, fsub*, fcmp**, fsel where XYZ* means XYZ, XYZs,
> XYZ., XYZs. and XYZ** means XYZu, XYZo",
> },
> [ PPC970MP_PME_PM_DATA_TABLEWALK_CYC ] = {
> .pme_name = "PM_DATA_TABLEWALK_CYC",
> @@ -1371,8 +1371,8 @@ static const pme_power_entry_t ppc970mp_pe[] = {
> [ PPC970MP_PME_PM_FPU_ALL ] = {
> .pme_name = "PM_FPU_ALL",
> .pme_code = 0x5100,
> - .pme_short_desc = "FPU executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "This signal is active for one cycle when
> FPU is executing an add, mult, sub, compare, or fsel kind of instruction.
> This could be fadd*, fmul*, fsub*, fcmp**, fsel where XYZ* means XYZ, XYZs,
> XYZ., XYZs. and XYZ** means XYZu, XYZo. Combined Unit 0 + Unit 1",
> },
> [ PPC970MP_PME_PM_LSU_SRQ_S0_ALLOC ] = {
> .pme_name = "PM_LSU_SRQ_S0_ALLOC",
> @@ -1485,8 +1485,8 @@ static const pme_power_entry_t ppc970mp_pe[] = {
> [ PPC970MP_PME_PM_FPU1_ALL ] = {
> .pme_name = "PM_FPU1_ALL",
> .pme_code = 0x107,
> - .pme_short_desc = "FPU1 executed add",
> - .pme_long_desc = " mult",
> + .pme_short_desc = "FPU1 executed add, mult, sub, cmp or sel
> instruction",
> + .pme_long_desc = "This signal is active for one cycle when
> fp1 is executing an add, mult, sub, compare, or fsel kind of instruction.
> This could be fadd*, fmul*, fsub*, fcmp**, fsel where XYZ* means XYZ, XYZs,
> XYZ., XYZs. and XYZ** means XYZu, XYZo",
> },
> [ PPC970MP_PME_PM_FPU1_FSQRT ] = {
> .pme_name = "PM_FPU1_FSQRT",
> --
> 1.7.0.4
>
>
------------------------------------------------------------------------------
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