On Sat, Mar 10, 2012 at 12:06 AM, <gary.m...@bull.com> wrote: > Hi Stephane, > > We have a customer that is using a PAPI built on top of libpfm4 that has > noticed a difference between the architectural events which are available > on Westmere and Sandy Bridge systems. In particular on Sandy Bridge, the > event UNHALTED_REFERENCE_CYCLES is shown as an architectural event but on > Westmere it is not. The event is known without the 'ix86arch::' prefix on > both systems. An example of output from each type of system is provided > below. > > > Westmere system: > vendor_id : GenuineIntel > cpu family : 6 > model : 44 > model name : Intel(R) Xeon(R) CPU E5649 @ 2.53GHz > >>>papi_native_avail | grep ix86arch > 0x40000027 ix86arch::UNHALTED_CORE_CYCLES | count core clock cycles > wheneve | > 0x40000028 ix86arch::INSTRUCTION_RETIRED | count the number of > instructions | > 0x40000029 ix86arch::LLC_REFERENCES | count each request originating > from t | > 0x4000002a ix86arch::LLC_MISSES | count each cache miss condition for > refer | > 0x4000002b ix86arch::BRANCH_INSTRUCTIONS_RETIRED | count branch > instruction | > 0x4000002c ix86arch::MISPREDICTED_BRANCH_RETIRED | count mispredicted > branc | > > > > Sandy Bridge system: > vendor_id : GenuineIntel > cpu family : 6 > model : 45 > model name : Genuine Intel(R) CPU @ 2.30GHz > >>>papi_native_avail | grep ix86arch > 0x40000020 ix86arch::UNHALTED_CORE_CYCLES | count core clock cycles > wheneve | > 0x40000021 ix86arch::INSTRUCTION_RETIRED | count the number of > instructions | > 0x40000022 ix86arch::UNHALTED_REFERENCE_CYCLES | count reference clock > cycl | > 0x40000023 ix86arch::LLC_REFERENCES | count each request originating > from t | > 0x40000024 ix86arch::LLC_MISSES | count each cache miss condition for > refer | > 0x40000025 ix86arch::BRANCH_INSTRUCTIONS_RETIRED | count branch > instruction | > 0x40000026 ix86arch::MISPREDICTED_BRANCH_RETIRED | count mispredicted > branc | > > > > I looked at the code a little bit and it looks like the table of > architectural events is built dynamically but I did not look close enough > to figure out how the code decided which events belonged in the table. I > also took a look at a Nehalem system and its table of architectural events > was a little different than either of these. > > It seems to us like the set of architectural events should be the same on > all three of these hardware platforms, would you agree ? > The ix86arch table is built dynamically based on the whatever is supported by the HW. There is a CPUID function that returns that. But unhalted_ref_cycles should be there for everyone. I know on NHM the BRANCH event is missing because broken. I will take a look at it this week-end.
> Thanks > Gary > ------------------------------------------------------------------------------ Virtualization & Cloud Management Using Capacity Planning Cloud computing makes use of virtualization - but cloud computing also focuses on allowing computing to be delivered as a service. http://www.accelacomm.com/jaw/sfnl/114/51521223/ _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel
