Vince, I applied your patch adding a man page, a few validation tests.
Thanks. On Thu, Jan 23, 2014 at 8:26 PM, Vince Weaver <vincent.wea...@maine.edu> wrote: > > Version 2 of this patch properly detects we have a Krait (not Scorpion) > CPU and also updates the number of counters to reflect what the kernel > reports. > > The following patch adds initial support for Qualcomm Krait (Snapdragon) > PMU to libpfm4. > > This is based off of the code from the recent > [PATCH 0/7] Support Krait CPU PMUs > thread on the linux-kernel mailing list. > As far as I can tell there's no publicly available documentation for this > PMU. > > We have a PAPI user who is running PAPI on such a processor. > > The chip is ARMv7, similar to the Cortex A15. Some issues: > > 1. Older versions of the chip have broken PC_WRITE event support. > > Should libpfm4 detect this (by part number) and have separate event > tables? > > 2. This patch only has minimal event support for common armv7 events. > The Krait CPUs support more events through a more complex > custom encoding. I think we should wait until the patches for > this make it into upstream linux-kernel before we bother > implementing them. > > > Signed-off-by: Vince Weaver <vincent.wea...@maine.edu> > > diff --git a/include/perfmon/pfmlib.h b/include/perfmon/pfmlib.h > index ac9ed03..5434a96 100644 > --- a/include/perfmon/pfmlib.h > +++ b/include/perfmon/pfmlib.h > @@ -196,6 +196,8 @@ typedef enum { > PFM_PMU_INTEL_SLM, /* Intel Silvermont */ > PFM_PMU_AMD64_FAM15H_NB, /* AMD AMD64 Fam15h NorthBridge */ > > + PFM_PMU_ARM_QCOM_KRAIT, /* Qualcomm Krait */ > + > /* MUST ADD NEW PMU MODELS HERE */ > > PFM_PMU_MAX /* end marker */ > diff --git a/lib/pfmlib_arm_armv7_pmuv1.c b/lib/pfmlib_arm_armv7_pmuv1.c > index 943101a..5fb14ca 100644 > --- a/lib/pfmlib_arm_armv7_pmuv1.c > +++ b/lib/pfmlib_arm_armv7_pmuv1.c > @@ -36,6 +36,7 @@ > #include "events/arm_cortex_a8_events.h" /* event tables */ > #include "events/arm_cortex_a9_events.h" > #include "events/arm_cortex_a15_events.h" > +#include "events/arm_qcom_krait_events.h" > > static int > pfm_arm_detect_cortex_a8(void *this) > @@ -88,6 +89,29 @@ pfm_arm_detect_cortex_a15(void *this) > return PFM_ERR_NOTSUPP; > } > > +static int > +pfm_arm_detect_krait(void *this) > +{ > + > + int ret; > + > + ret = pfm_arm_detect(this); > + if (ret != PFM_SUCCESS) > + return PFM_ERR_NOTSUPP; > + > + /* Check for Qualcomm */ > + if (pfm_arm_cfg.implementer == 0x51) { > + /* Check that [15:10] of midr is 0x01 which */ > + /* indicates Krait rather than Scorpion CPU */ > + /* pfm_arm_cfg.part is (midr>>4)&0xfff */ > + if (pfm_arm_cfg.part >> 6 == 0x1) { > + return PFM_SUCCESS; > + } > + } > + return PFM_ERR_NOTSUPP; > +} > + > + > /* Cortex A8 support */ > pfmlib_pmu_t arm_cortex_a8_support={ > .desc = "ARM Cortex A8", > @@ -163,3 +187,29 @@ pfmlib_pmu_t arm_cortex_a15_support={ > PFMLIB_VALID_PERF_PATTRS(pfm_arm_perf_validate_pattrs), > .get_event_nattrs = pfm_arm_get_event_nattrs, > }; > + > +/* Qualcomm Krait support */ > +pfmlib_pmu_t arm_qcom_krait_support={ > + .desc = "ARM Qualcomm Krait", > + .name = "qcom_krait", > + .pmu = PFM_PMU_ARM_QCOM_KRAIT, > + .pme_count = LIBPFM_ARRAY_SIZE(arm_qcom_krait_pe), > + .type = PFM_PMU_TYPE_CORE, > + .pe = arm_qcom_krait_pe, > + > + .pmu_detect = pfm_arm_detect_krait, > + .max_encoding = 1, > + .num_cntrs = 5, > + .supported_plm = ARMV7_A15_PLM, > + > + .get_event_encoding[PFM_OS_NONE] = pfm_arm_get_encoding, > + PFMLIB_ENCODE_PERF(pfm_arm_get_perf_encoding), > + .get_event_first = pfm_arm_get_event_first, > + .get_event_next = pfm_arm_get_event_next, > + .event_is_valid = pfm_arm_event_is_valid, > + .validate_table = pfm_arm_validate_table, > + .get_event_info = pfm_arm_get_event_info, > + .get_event_attr_info = pfm_arm_get_event_attr_info, > + PFMLIB_VALID_PERF_PATTRS(pfm_arm_perf_validate_pattrs), > + .get_event_nattrs = pfm_arm_get_event_nattrs, > +}; > diff --git a/lib/pfmlib_common.c b/lib/pfmlib_common.c > index ea05e37..861f475 100644 > --- a/lib/pfmlib_common.c > +++ b/lib/pfmlib_common.c > @@ -163,6 +163,7 @@ static pfmlib_pmu_t *pfmlib_pmus[]= > &arm_cortex_a9_support, > &arm_cortex_a15_support, > &arm_1176_support, > + &arm_qcom_krait_support, > #endif > #ifdef CONFIG_PFMLIB_ARCH_S390X > &s390x_cpum_cf_support, > diff --git a/lib/pfmlib_priv.h b/lib/pfmlib_priv.h > index f44ffe5..287222d 100644 > --- a/lib/pfmlib_priv.h > +++ b/lib/pfmlib_priv.h > @@ -291,6 +291,7 @@ extern pfmlib_pmu_t arm_cortex_a8_support; > extern pfmlib_pmu_t arm_cortex_a9_support; > extern pfmlib_pmu_t arm_cortex_a15_support; > extern pfmlib_pmu_t arm_1176_support; > +extern pfmlib_pmu_t arm_qcom_krait_support; > extern pfmlib_pmu_t mips_74k_support; > extern pfmlib_pmu_t s390x_cpum_cf_support; > > diff --git a/lib/events/arm_qcom_krait_events.h > b/lib/events/arm_qcom_krait_events.h > new file mode 100644 > index 0000000..90f46db > --- /dev/null > +++ b/lib/events/arm_qcom_krait_events.h > @@ -0,0 +1,66 @@ > +/* > + * Copyright (c) 2014 by Vince Weaver <vincent.wea...@maine.edu> > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > copy > + * of this software and associated documentation files (the "Software"), to > deal > + * in the Software without restriction, including without limitation the > rights > + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell > copies > + * of the Software, and to permit persons to whom the Software is furnished > to do so, > + * subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included > in all > + * copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS > OR IMPLIED, > + * INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS > FOR A > + * PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR > COPYRIGHT > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN > AN ACTION OF > + * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH > THE SOFTWARE > + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. > + * > + * Qualcomm Krait Chips > + * based on info in the thread on linux-kernel: > + * [PATCH 0/7] Support Krait CPU PMUs > + */ > +static const arm_entry_t arm_qcom_krait_pe[]={ > + {.name = "L1D_CACHE_REFILL", > + .modmsk = ARMV7_A15_ATTRS, > + .code = 0x03, > + .desc = "Level 1 data cache refill" > + }, > + {.name = "L1D_CACHE_ACCESS", > + .modmsk = ARMV7_A15_ATTRS, > + .code = 0x04, > + .desc = "Level 1 data cache access" > + }, > + {.name = "INSTR_EXECUTED", > + .modmsk = ARMV7_A15_ATTRS, > + .code = 0x08, > + .desc = "Instructions architecturally executed" > + }, > + {.name = "PC_WRITE", > + .modmsk = ARMV7_A15_ATTRS, > + .code = 0x0c, > + .desc = "Software change of PC. Equivalent to branches" > + }, > + {.name = "PC_BRANCH_MIS_PRED", > + .modmsk = ARMV7_A15_ATTRS, > + .code = 0x10, > + .desc = "Branches mispredicted or not predicted" > + }, > + {.name = "CLOCK_CYCLES", > + .modmsk = ARMV7_A15_ATTRS, > + .code = 0x11, > + .desc = "Cycles" > + }, > + {.name = "BRANCH_PRED", > + .modmsk = ARMV7_A15_ATTRS, > + .code = 0x12, > + .desc = "Predictable branch speculatively executed" > + }, > + {.name = "CPU_CYCLES", > + .modmsk = ARMV7_A15_ATTRS, > + .code = 0xff, > + .desc = "Cycles" > + }, > +}; ------------------------------------------------------------------------------ CenturyLink Cloud: The Leader in Enterprise Cloud Services. Learn Why More Businesses Are Choosing CenturyLink Cloud For Critical Workloads, Development Environments & Everything In Between. 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