On Tue, 24 Feb 2015, zeuchste wrote:
> Hello the description of the native counter
> "OFFCORE_RESPONSE:PF_LLC_DATA_RD" is "Request: number of L3 prefetcher
> requests to L2 for loads". I think the L3 and L2 are accidentally
> switched because of two reasons:
> 1.) There is no L3 prefetcher in modern intel cpus (maybe in ARM or AMDs?)
> 2.) The description of the corresponding instruction fetch counter
> "OFFCORE_RESPONSE:PF_LLC_IFETCH" contains, in my optinion, the right
> description "Request: number of L2 prefetcher requests to L3 for
> instruction fetches"
The best thing to do is check the Intel documentation, in this case
the Intel Developer Manual, volume 3-b
Table 18-31 does indeed say:
PF_LLC_DATA_RD 7 (R/W). L2 prefetcher to L3 for loads.
PAPI gets its event values directly from libpfm4, so I'm ccing the libpfm4
list.
Vince
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