Hi, On Jun 8, 2015 4:16 AM, "Maxime Colmant" <maxime.colm...@inria.fr> wrote: > > Hello, > > I understand correctly the principle of generic / fixed counters, but I’m wondering if there is a way to detect automatically whether an event corresponds to a fixed counter. > The library for x86 maintains a mask with possible counters for each event. But it us not exposed nor used by the library at this point.
> I saw it was to possible to retrieve theirs numbers with libpfm, but it does not help to classify them in two subsets. > Is this concept specific to Intel processor? I cannot find any documentation about fixed counters on AMD or ARM for example. > Fixed counters only exist on x86 core PMU. They may be present in other hw components such as I/o controllers. None exist on AMD or ARM core PMUs. > For example, on my Xeon processor (Nehalem), I have 4 generic counters (HT on) and 2 fixed counters (3 - 1 because of NMI watchdog). > For instance, I suppose that the events mapped to the fixed counters are: 0xC0 (INSTRUCTION_RETIRED) and 0x300 (UNHALTED_REFERENCE_CYCLES) based on my experiments. > Can I say that these events and 0x3c (UNHALTED_CORE_CYCLES) are mapped to the fixed counters for Intel processors? Or, is there a way to find them automatically? Are they common for Intel processors? > On Linux, you do not have to worry about which counter is used by each event. The library does not do the scheduling, the kernel does and you have no real control. The algorithm in the kernel will try fixed counters first if an event is a fixed event. This is determined by a table per CPU model in the kernel. > Many thanks, > > > Command output: > dmesg | grep -A 15 Nehalem > [ 0.171273] Performance Events: PEBS fmt1+, 16-deep LBR, Nehalem events, Intel PMU driver. > [ 0.171278] perf_event_intel: CPU erratum AAJ80 worked around > [ 0.171279] perf_event_intel: CPUID marked event: 'bus cycles' unavailable > [ 0.171281] ... version: 3 > [ 0.171282] ... bit width: 48 > [ 0.171282] ... generic registers: 4 > [ 0.171283] ... value mask: 0000ffffffffffff > [ 0.171284] ... max period: 000000007fffffff > [ 0.171285] ... fixed-purpose events: 3 > [ 0.171286] ... event mask: 000000070000000f > [ 0.172934] x86: Booting SMP configuration: > [ 0.186247] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter. > > Maxime Colmant > PhD Student - ADEME / University Lille 1 > Spirals Team - INRIA Lille, bât. B > > Tel. : +33(0) 3 59 35 87 79 > Perso. : +33(0) 6 24 00 12 35 > > http://mcolmant.github.io > > > > ------------------------------------------------------------------------------ > > _______________________________________________ > perfmon2-devel mailing list > perfmon2-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/perfmon2-devel >
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