On Tue, 2022-08-09 at 08:08 +0200, Giuseppe Congiu wrote:
> Hi Will,
> 
> We would need to verify your power10 presets before we add them to
> PAPI. We have a test suite that we normally use to do that (the
> counter analysis toolkit - CAT). Unfortunately, we don’t have access
> to any power10 machines at the moment. Would it be possible for us to
> run the counter analysis toolkit on one of your power10 systems? This
> would help speeding up the integration of the presets in PAPI.

Hi,

Depending on who 'us' is.. :-)    I can poke around internally to see
what the status is of getting public Power10 systems available, though
that is generally out of my sphere of influence.   I can certainly run
it and report results.  
 I hacked away at a few makefile/path entries
in the counter_analysis_toolkit subdir and got something to run... 
I'll take advice and suggestions on what to tweak in order to continue.

I took the entirety of the event list entries mentioned in this patch,
added them to the event_list.txt ala
PAPI_REF_CYC 0
PAPI_L1_DCM 0
PAPI_L1_LDM 0
...
and ran cat_collect as
indicated in the README.   The test does seem to hang after generating
some results.. 

Under -verbose it appears to be hanging on the D-Cache
latencies portion.  

Branch Benchmarks: 100%
D-Cache Latencies: 0%
and most of the output created up to this point does have data. 


cat
PAPI_LST_INS.branch
38.00
41.00
39.00
305.25
369.00
367.75
181.25
245.25
243.50
7
2.00
6.00

Thanks
-Will

> 
> Thank you,
> Giuseppe  
> 
> > On 4 Aug 2022, at 03:57, will schmidt <will_schm...@vnet.ibm.com>
> > wrote:
> > 
> > On Wed, 2022-08-03 at 21:29 +0200, Giuseppe Congiu wrote:
> > > Hi will,
> > > 
> > > How did you define the PAPI preset?
> > > 
> > 
> > Meaning how did I come up with the values used? :-)
> > Typically I start
> > with the values for the previous processor,
> > and depending on the changes to the current Power PMU event list,
> > do my best to refresh any event entries with their new equivalents.
> > 
> > Thanks
> > -Will
> > 
> > > —Giuseppe
> > > 
> > > > On 3 Aug 2022, at 20:51, will schmidt <
> > > > will_schm...@vnet.ibm.com>
> > > > wrote:
> > > > 
> > > > [PATCH] PAPI, Power10 event list mappings.
> > > > 
> > > > Hi,
> > > > This patch provides the PAPI event
> > > > mappings for Power10 support.
> > > > 
> > > > This should be safe to commit once PAPI completes
> > > > the pull requests from libpfm4 that will include
> > > > the prerequisite Power10 content.
> > > > 
> > > > 
> > > > 
> > > > 
> > > > diff --git a/src/papi_events.csv b/src/papi_events.csv
> > > > index 4ef647959..d1c89d30b 100644
> > > > --- a/src/papi_events.csv
> > > > +++ b/src/papi_events.csv
> > > > @@ -1673,10 +1673,59 @@
> > > > PRESET,PAPI_BR_CN,DERIVED_SUB,PM_BR_CMPL,PM_BR_UNCOND
> > > > PRESET,PAPI_BR_NTK,DERIVED_POSTFIX,N0|N1|-
> > > > > ,PM_BR_CMPL,PM_BR_TAKEN_CMPL
> > > > PRESET,PAPI_BR_UCN,NOT_DERIVED,PM_BR_UNCOND
> > > > PRESET,PAPI_BR_TKN,NOT_DERIVED,PM_BR_CORECT_PRED_TAKEN_CMPL
> > > > PRESET,PAPI_FXU_IDL,NOT_DERIVED,PM_FXU_IDLE
> > > > #
> > > > +CPU,POWER10
> > > > +CPU,power10
> > > > +#
> > > > +PRESET,PAPI_REF_CYC,NOT_DERIVED,PM_CYC_ALT3
> > > > +PRESET,PAPI_L1_DCM,NOT_DERIVED,PM_LD_MISS_L1
> > > > +PRESET,PAPI_L1_LDM,NOT_DERIVED,PM_LD_MISS_L1
> > > > +PRESET,PAPI_L1_STM,NOT_DERIVED,PM_ST_MISS_L1
> > > > +PRESET,PAPI_L1_DCW,DERIVED_SUB,PM_ST_FIN,PM_ST_MISS_L1
> > > > +PRESET,PAPI_L1_DCR,NOT_DERIVED,PM_LD_HIT_L1
> > > > +PRESET,PAPI_L1_DCA,DERIVED_ADD,PM_LD_REF_L1,PM_ST_CMPL
> > > > +PRESET,PAPI_L2_DCM,NOT_DERIVED,PM_DATA_FROM_L2MISS
> > > > +PRESET,PAPI_L2_LDM,NOT_DERIVED,PM_L2_LD_MISS
> > > > +PRESET,PAPI_L2_STM,NOT_DERIVED,PM_L2_ST_MISS
> > > > +PRESET,PAPI_L2_DCR,NOT_DERIVED,PM_DATA_FROM_L2
> > > > +PRESET,PAPI_L2_DCW,NOT_DERIVED,PM_L2_ST
> > > > +PRESET,PAPI_L3_DCR,NOT_DERIVED,PM_DATA_FROM_L3
> > > > +PRESET,PAPI_L3_DCM,NOT_DERIVED,PM_DATA_FROM_L3MISS
> > > > +PRESET,PAPI_L3_LDM,NOT_DERIVED,PM_L3_LD_MISS
> > > > +PRESET,PAPI_L1_ICH,NOT_DERIVED,PM_INST_FROM_LMEM
> > > > +PRESET,PAPI_L1_ICM,NOT_DERIVED,PM_L1_ICACHE_MISS
> > > > +PRESET,PAPI_L2_ICM,NOT_DERIVED,PM_INST_FROM_L3
> > > > +PRESET,PAPI_L2_ICH,NOT_DERIVED,PM_INST_FROM_L2
> > > > +PRESET,PAPI_L3_ICA,NOT_DERIVED,PM_INST_FROM_L2MISS
> > > > +PRESET,PAPI_L3_ICH,NOT_DERIVED,PM_INST_FROM_L3
> > > > +PRESET,PAPI_L3_ICM,NOT_DERIVED,PM_INST_FROM_L3MISS
> > > > +PRESET,PAPI_FMA_INS,NOT_DERIVED,PM_FMA_CMPL
> > > > +#PRESET,PAPI_TOT_IIS,NOT_DERIVED,
> > > > +PRESET,PAPI_TOT_INS,NOT_DERIVED,PM_INST_CMPL
> > > > +PRESET,PAPI_INT_INS,NOT_DERIVED,PM_FXU_ISSUE
> > > > +PRESET,PAPI_FP_OPS,NOT_DERIVED,PM_FLOP_CMPL
> > > > +PRESET,PAPI_FP_INS,NOT_DERIVED,PM_FLOP_CMPL
> > > > +PRESET,PAPI_DP_OPS,NOT_DERIVED,PM_2FLOP_CMPL
> > > > +PRESET,PAPI_SP_OPS,NOT_DERIVED,PM_SP_FLOP_CMPL
> > > > +PRESET,PAPI_TOT_CYC,NOT_DERIVED,PM_RUN_CYC
> > > > +#PRESET,PAPI_HW_INT,NOT_DERIVED,PM_EXT_INT
> > > > +PRESET,PAPI_STL_ICY,DERIVED_POSTFIX,N0|N1|-
> > > > > ,PM_RUN_CYC,PM_1PLUS_PPC_DISP
> > > > +PRESET,PAPI_SR_INS,NOT_DERIVED,PM_ST_FIN
> > > > +PRESET,PAPI_LD_INS,NOT_DERIVED,PM_LD_REF_L1
> > > > +PRESET,PAPI_LST_INS,NOT_DERIVED,PM_LSU_FIN
> > > > +PRESET,PAPI_LST_INS,DERIVED_ADD,PM_LD_REF_L1,PM_LD_MISS_L1,PM_
> > > > ST_F
> > > > IN
> > > > +PRESET,PAPI_BR_INS,NOT_DERIVED,PM_BR_FIN
> > > > +PRESET,PAPI_BR_MSP,NOT_DERIVED,PM_BR_MPRED_CMPL
> > > > +#PRESET,PAPI_BR_PRC,NOT_DERIVED,
> > > > +PRESET,PAPI_BR_CN,DERIVED_SUB,PM_BR_TAKEN_CMPL,PM_BR_TKN_UNCON
> > > > D_FI
> > > > N
> > > > +PRESET,PAPI_BR_NTK,NOT_DERIVED,PM_BR_MPRED_CMPL
> > > > +PRESET,PAPI_BR_UCN,NOT_DERIVED,PM_BR_FIN
> > > > +PRESET,PAPI_BR_TKN,NOT_DERIVED,PM_BR_TAKEN_CMPL
> > > > +#PRESET,PAPI_FXU_IDL,NOT_DERIVED,PM_FXU_IDLE
> > > > +#
> > > > CPU,ultra12
> > > > #
> > > > PRESET,PAPI_TOT_CYC,NOT_DERIVED,CYCLE_CNT
> > > > PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTR_CNT
> > > > PRESET,PAPI_L1_ICM,NOT_DERIVED,DISPATCH0_IC_MISS
> > > > 



_______________________________________________
perfmon2-devel mailing list
perfmon2-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/perfmon2-devel

Reply via email to