Hi, Thanks for reporting the problem. I have now fixed the issue in the git repo.
On Tue, Apr 9, 2024 at 5:26 PM laksono <laks...@gmail.com> wrote: > > Hi > > I found that pfm_get_os_event_encoding() returns the same code for both > spr::TOPDOWN:SLOTS and spr::TOPDOWN:BAD_SPEC_SLOTS counters. > > If I run the check_events example: > > $ ./check_events TOPDOWN:SLOTS > ... > Requested Event: TOPDOWN:SLOTS > Actual Event: spr::TOPDOWN:SLOTS:k=1:u=1:e=0:i=0:c=0:intx=0:intxcp=0 > PMU : Intel SapphireRapid > IDX : 1073741888 > Codes : 0x530400 > > $ ./check_events TOPDOWN:BAD_SPEC_SLOTS > Requested Event: TOPDOWN:BAD_SPEC_SLOTS > Actual Event: > spr::TOPDOWN:BAD_SPEC_SLOTS:k=1:u=1:e=0:i=0:c=0:intx=0:intxcp=0 > PMU : Intel SapphireRapid > IDX : 1073741888 > Codes : 0x530400 > > Other sub-events like TOPDOWN:BACKEND_BOUND_SLOTS, > TOPDOWN:BR_MISPREDICT_SLOTS and TOPDOWN:MEMORY_BOUND_SLOTS have correctly > unique codes. > > Interestingly, the ./showevtinfo program shows that both TOPDOWN:SLOTS and > TOPDOWN:BAD_SPEC_SLOTS have the sane Umask. > > IDX : 1073741888 > PMU name : spr (Intel SapphireRapid) > Name : TOPDOWN > Equiv : None > Flags : [hw_smpl] [speculative] > Desc : Topdown events. > Code : 0x0 > Umask-00 : 0x02 : PMU : [BACKEND_BOUND_SLOTS] : [hw_smpl] [speculative] : TMA > slots where no uops were being issued due to lack of back-end resources. > Umask-01 : 0x04 : PMU : [BAD_SPEC_SLOTS] : [hw_smpl] [speculative] : TMA > slots wasted due to incorrect speculations. > Umask-02 : 0x08 : PMU : [BR_MISPREDICT_SLOTS] : [hw_smpl] [speculative] : TMA > slots wasted due to incorrect speculation by branch mispredictions > Umask-03 : 0x10 : PMU : [MEMORY_BOUND_SLOTS] : [hw_smpl] [speculative] : TBD > Umask-04 : 0x04 : PMU : [SLOTS] : [hw_smpl] [speculative] : TMA slots > available for an unhalted logical processor. Fixed counter - architectural > event > Umask-05 : 0x1a4 : PMU : [SLOTS_P] : [hw_smpl] [speculative] : TMA slots > available for an unhalted logical processor. General counter - architectural > event > Modif-00 : 0x00 : PMU : [k] : monitor at priv level 0 (boolean) > Modif-01 : 0x01 : PMU : [u] : monitor at priv level 1, 2, 3 (boolean) > Modif-02 : 0x02 : PMU : [e] : edge level (may require counter-mask >= 1) > (boolean) > Modif-03 : 0x03 : PMU : [i] : invert (boolean) > Modif-04 : 0x04 : PMU : [c] : counter-mask in range [0-255] (integer) > Modif-05 : 0x07 : PMU : [intx] : monitor only inside transactional memory > region (boolean) > Modif-06 : 0x08 : PMU : [intxcp] : do not count occurrences inside aborted > transactional memory region (boolean) > > This is tested with Intel Sapphire Rapid CPU on Linux 4.18 using the latest > libpfm4 from the git repository. > > Laksono Adhianto > _______________________________________________ > perfmon2-devel mailing list > perfmon2-devel@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/perfmon2-devel _______________________________________________ perfmon2-devel mailing list perfmon2-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/perfmon2-devel
