Just some coding style changes for the existing powerpc perfmon code.
Signed-off-by: Kevin Corry <[EMAIL PROTECTED]>
Index: linux-2.6.20-arnd3-perfmon/arch/powerpc/perfmon/perfmon.c
===================================================================
--- linux-2.6.20-arnd3-perfmon.orig/arch/powerpc/perfmon/perfmon.c
+++ linux-2.6.20-arnd3-perfmon/arch/powerpc/perfmon/perfmon.c
@@ -1,5 +1,5 @@
/*
- * This file implements the ppc64 specific
+ * This file implements the powerpc specific
* support for the perfmon2 interface
*
* Copyright (c) 2005 David Gibson, IBM Corporation.
@@ -21,7 +21,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
- */
+ */
#include <linux/interrupt.h>
#include <linux/perfmon.h>
@@ -34,15 +34,15 @@ static void __pfm_get_ovfl_pmds(struct p
struct pfm_event_set *set)
{
u64 new_val, wmask;
- u64 *used_mask, *cnt_pmds;
- u64 mask[PFM_PMD_BV];
+ u64 *used_mask, *cnt_pmds;
+ u64 mask[PFM_PMD_BV];
unsigned int i, max;
max = pfm_pmu_conf->max_cnt_pmd;
used_mask = set->used_pmds;
- cnt_pmds = pfm_pmu_conf->cnt_pmds;
+ cnt_pmds = pfm_pmu_conf->cnt_pmds;
wmask = 1ULL << pfm_pmu_conf->counter_width;
- bitmap_and(ulp(mask), ulp(cnt_pmds), ulp(used_mask), max);
+ bitmap_and(ulp(mask), ulp(cnt_pmds), ulp(used_mask), max);
for (i = 0; i < max; i++) {
/* assume all PMD are counters */
@@ -50,9 +50,8 @@ static void __pfm_get_ovfl_pmds(struct p
new_val = pfm_arch_read_pmd(ctx, i);
PFM_DBG_ovfl("pmd%u new_val=0x%llx bit=%d",
- i,
- (unsigned long long)new_val,
- (new_val&wmask) ? 1 : 0);
+ i, (unsigned long long)new_val,
+ (new_val & wmask) ? 1 : 0);
if (!(new_val & wmask)) {
__set_bit(i, set->povfl_pmds);
@@ -62,8 +61,8 @@ static void __pfm_get_ovfl_pmds(struct p
}
}
-static void pfm_stop_active(struct task_struct *task, struct pfm_context *ctx,
- struct pfm_event_set *set)
+static void pfm_stop_active(struct task_struct *task,
+ struct pfm_context *ctx, struct pfm_event_set *set)
{
unsigned int i, max;
@@ -71,10 +70,9 @@ static void pfm_stop_active(struct task_
/*
* clear enable bits
*/
- for (i = 0; i < max; i++) {
+ for (i = 0; i < max; i++)
if (test_bit(i, set->used_pmcs))
pfm_arch_write_pmc(ctx, i,0);
- }
if (set->npend_ovfls)
return;
@@ -93,8 +91,8 @@ static void pfm_stop_active(struct task_
* non-zero : did not save PMDs (as part of stopping the PMU)
* 0 : saved PMDs (no need to save them in caller)
*/
-int pfm_arch_ctxswout_thread(struct task_struct *task, struct pfm_context *ctx,
- struct pfm_event_set *set)
+int pfm_arch_ctxswout_thread(struct task_struct *task,
+ struct pfm_context *ctx, struct pfm_event_set *set)
{
/*
* disable lazy restore of PMC registers.
@@ -122,8 +120,8 @@ int pfm_arch_ctxswout_thread(struct task
*
* must disable active monitoring.
*/
-void pfm_arch_stop(struct task_struct *task, struct pfm_context *ctx,
- struct pfm_event_set *set)
+void pfm_arch_stop(struct task_struct *task,
+ struct pfm_context *ctx, struct pfm_event_set *set)
{
/*
* stop live registers and collect pending overflow
@@ -147,8 +145,8 @@ void pfm_arch_stop(struct task_struct *t
*
* must enable active monitoring.
*/
-void pfm_arch_start(struct task_struct *task, struct pfm_context *ctx,
- struct pfm_event_set *set)
+void pfm_arch_start(struct task_struct *task,
+ struct pfm_context *ctx, struct pfm_event_set *set)
{
unsigned int i, max_pmc;
@@ -157,10 +155,9 @@ void pfm_arch_start(struct task_struct *
max_pmc = pfm_pmu_conf->max_pmc;
- for (i = 0; i < max_pmc; i++) {
+ for (i = 0; i < max_pmc; i++)
if (test_bit(i,set->used_pmcs))
pfm_arch_write_pmc(ctx, i, set->pmcs[i]);
- }
}
/*
@@ -270,45 +267,44 @@ void pfm_arch_intr_unfreeze_pmu(struct p
char *pfm_arch_get_pmu_module_name(void)
{
- unsigned int pvr = mfspr(SPRN_PVR);
+ unsigned int pvr = mfspr(SPRN_PVR);
- switch (PVR_VER(pvr))
- {
- case 0x0004: /* 604 */
- case 0x0009: /* 604e; */
- case 0x000A: /* 604ev */
- case 0x0008: /* 750/740 */
- case 0x7000: /* 750FX */
- case 0x7001:
- case 0x7002: /* 750GX */
- case 0x000C: /* 7400 */
- case 0x800C: /* 7410 */
- case 0x8000: /* 7451/7441 */
- case 0x8001: /* 7455/7445 */
- case 0x8002: /* 7457/7447 */
- case 0x8003: /* 7447A */
- case 0x8004: /* 7448 */
- return("perfmon_ppc32");
- case PV_POWER4:
- case PV_POWER4p:
- return "perfmon_power4";
- case PV_POWER5:
- case PV_POWER5p:
- return "perfmon_power5";
- case PV_970:
- case PV_970FX:
- case PV_970MP:
- return "perfmon_ppc970";
- case PV_BE:
- return "perfmon_cell";
- }
- return NULL;
+ switch (PVR_VER(pvr)) {
+ case 0x0004: /* 604 */
+ case 0x0009: /* 604e; */
+ case 0x000A: /* 604ev */
+ case 0x0008: /* 750/740 */
+ case 0x7000: /* 750FX */
+ case 0x7001:
+ case 0x7002: /* 750GX */
+ case 0x000C: /* 7400 */
+ case 0x800C: /* 7410 */
+ case 0x8000: /* 7451/7441 */
+ case 0x8001: /* 7455/7445 */
+ case 0x8002: /* 7457/7447 */
+ case 0x8003: /* 7447A */
+ case 0x8004: /* 7448 */
+ return("perfmon_ppc32");
+ case PV_POWER4:
+ case PV_POWER4p:
+ return "perfmon_power4";
+ case PV_POWER5:
+ case PV_POWER5p:
+ return "perfmon_power5";
+ case PV_970:
+ case PV_970FX:
+ case PV_970MP:
+ return "perfmon_ppc970";
+ case PV_BE:
+ return "perfmon_cell";
+ }
+ return NULL;
}
void pfm_arch_init_percpu(void)
{
#ifdef CONFIG_PPC64
- extern void ppc64_enable_pmcs(void);
- ppc64_enable_pmcs();
+ extern void ppc64_enable_pmcs(void);
+ ppc64_enable_pmcs();
#endif
}
Index: linux-2.6.20-arnd3-perfmon/arch/powerpc/perfmon/perfmon_power5.c
===================================================================
--- linux-2.6.20-arnd3-perfmon.orig/arch/powerpc/perfmon/perfmon_power5.c
+++ linux-2.6.20-arnd3-perfmon/arch/powerpc/perfmon/perfmon_power5.c
@@ -1,5 +1,5 @@
/*
- * This file contains the POWER4 PMU register description tables
+ * This file contains the POWER5 PMU register description tables
* and pmc checker used by perfmon.c.
*
* Copyright (c) 2005 David Gibson, IBM Corporation.
@@ -21,12 +21,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
- */
+ */
#include <linux/module.h>
#include <linux/perfmon.h>
MODULE_AUTHOR("David Gibson <[EMAIL PROTECTED]>");
-MODULE_DESCRIPTION("POWER4 PMU description table");
+MODULE_DESCRIPTION("POWER5 PMU description table");
MODULE_LICENSE("GPL");
static struct pfm_reg_desc pfm_power5_pmc_desc[]={
@@ -34,7 +34,7 @@ static struct pfm_reg_desc pfm_power5_pm
/* mmcr1 */ PMC_D(PFM_REG_I, "MMCR1", 0x0, 0, 0, 0),
/* mmcra */ PMC_D(PFM_REG_I, "MMCRA", 0x0, 0, 0, 0)
};
-#define PFM_PM_NUM_PMCS (sizeof(pfm_power5_pmc_desc)/sizeof(struct
pfm_reg_desc))
+#define PFM_PM_NUM_PMCS ARRAY_SIZE(pfm_power5_pmc_desc)
static struct pfm_reg_desc pfm_power5_pmd_desc[]={
/* tb */ PMD_D(PFM_REG_C, "TB" , 0), /* rsvd_msk = -1 */
@@ -45,7 +45,7 @@ static struct pfm_reg_desc pfm_power5_pm
/* pmd5 */ PMD_D(PFM_REG_C, "PMC5", 0),
/* pmd6 */ PMD_D(PFM_REG_C, "PMC6", 0)
};
-#define PFM_PM_NUM_PMDS (sizeof(pfm_power5_pmd_desc)/sizeof(struct
pfm_reg_desc))
+#define PFM_PM_NUM_PMDS ARRAY_SIZE(pfm_power5_pmd_desc)
static int pfm_power5_probe_pmu(void)
{
Index: linux-2.6.20-arnd3-perfmon/arch/powerpc/perfmon/perfmon_ppc32.c
===================================================================
--- linux-2.6.20-arnd3-perfmon.orig/arch/powerpc/perfmon/perfmon_ppc32.c
+++ linux-2.6.20-arnd3-perfmon/arch/powerpc/perfmon/perfmon_ppc32.c
@@ -3,7 +3,7 @@
* and pmc checker used by perfmon.c.
*
* Philip Mucci, [EMAIL PROTECTED]
- *
+ *
* Based on code from:
* Copyright (c) 2005 David Gibson, IBM Corporation.
*
@@ -24,7 +24,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
- */
+ */
#include <linux/module.h>
#include <linux/perfmon.h>
#include <asm/reg.h>
@@ -33,56 +33,56 @@ MODULE_AUTHOR("Philip Mucci <[EMAIL PROTECTED]
MODULE_DESCRIPTION("PPC32 PMU description table");
MODULE_LICENSE("GPL");
-struct pfm_arch_pmu_info pfm_ppc32_pmu_info={
- .pmu_style = PM_NONE,
+struct pfm_arch_pmu_info pfm_ppc32_pmu_info = {
+ .pmu_style = PM_NONE,
};
static struct pfm_pmu_config pfm_ppc32_pmu_conf;
-static struct pfm_reg_desc pfm_ppc32_pmc_desc[]={
+static struct pfm_reg_desc pfm_ppc32_pmc_desc[] = {
/* mmcr0 */ PMC_D(PFM_REG_I, "MMCR0", 0x0, 0, 0, SPRN_MMCR0),
/* mmcr1 */ PMC_D(PFM_REG_I, "MMCR1", 0x0, 0, 0, SPRN_MMCR1),
-/* mmcr2 */ PMC_D(PFM_REG_I, "MMCR2", 0x0, 0, 0, SPRN_MMCR2)
+/* mmcr2 */ PMC_D(PFM_REG_I, "MMCR2", 0x0, 0, 0, SPRN_MMCR2),
};
-#define PFM_PM_NUM_PMCS (sizeof(pfm_ppc32_pmc_desc)/sizeof(struct
pfm_reg_desc))
+#define PFM_PM_NUM_PMCS ARRAY_SIZE(pfm_ppc32_pmc_desc)
-static struct pfm_reg_desc pfm_ppc32_pmd_desc[]={
+static struct pfm_reg_desc pfm_ppc32_pmd_desc[] = {
/* pmd0 */ PMD_D(PFM_REG_C, "PMC1", SPRN_PMC1),
/* pmd1 */ PMD_D(PFM_REG_C, "PMC2", SPRN_PMC2),
/* pmd2 */ PMD_D(PFM_REG_C, "PMC3", SPRN_PMC3),
/* pmd3 */ PMD_D(PFM_REG_C, "PMC4", SPRN_PMC4),
/* pmd4 */ PMD_D(PFM_REG_C, "PMC5", SPRN_PMC5),
-/* pmd5 */ PMD_D(PFM_REG_C, "PMC6", SPRN_PMC6)
+/* pmd5 */ PMD_D(PFM_REG_C, "PMC6", SPRN_PMC6),
};
-#define PFM_PM_NUM_PMDS (sizeof(pfm_ppc32_pmd_desc)/sizeof(struct
pfm_reg_desc))
+#define PFM_PM_NUM_PMDS ARRAY_SIZE(pfm_ppc32_pmd_desc)
-static void perfmon_perf_irq(struct pt_regs *regs)
+static void perfmon_perf_irq(struct pt_regs *regs)
{
- /* BLATANTLY STOLEN FROM OPROFILE, then modified */
+ u32 mmcr0;
+
+ /* BLATANTLY STOLEN FROM OPROFILE, then modified */
+
+ /* set the PMM bit (see comment below) */
+ mtmsr(mfmsr() | MSR_PMM);
+
+ pfm_interrupt_handler(instruction_pointer(regs), regs);
+
+ /* The freeze bit was set by the interrupt.
+ * Clear the freeze bit, and reenable the interrupt.
+ * The counters won't actually start until the rfi clears
+ * the PMM bit.
+ */
+
+ /* Unfreezes the counters on this CPU, enables the interrupt,
+ * enables the counters to trigger the interrupt, and sets the
+ * counters to only count when the mark bit is not set.
+ */
+ mmcr0 = mfspr(SPRN_MMCR0);
+
+ mmcr0 &= ~(MMCR0_FC | MMCR0_FCM0);
+ mmcr0 |= (MMCR0_FCECE | MMCR0_PMC1CE | MMCR0_PMCnCE | MMCR0_PMXE);
- /* set the PMM bit (see comment below) */
- mtmsr(mfmsr() | MSR_PMM);
-
- pfm_interrupt_handler(instruction_pointer(regs),regs);
-
- /* The freeze bit was set by the interrupt. */
- /* Clear the freeze bit, and reenable the interrupt.
- * The counters won't actually start until the rfi clears
- * the PMM bit */
-
-
- /* Unfreezes the counters on this CPU, enables the interrupt,
- * enables the counters to trigger the interrupt, and sets the
- * counters to only count when the mark bit is not set.
- */
- {
- u32 mmcr0 = mfspr(SPRN_MMCR0);
-
- mmcr0 &= ~(MMCR0_FC | MMCR0_FCM0);
- mmcr0 |= (MMCR0_FCECE | MMCR0_PMC1CE | MMCR0_PMCnCE | MMCR0_PMXE);
-
- mtspr(SPRN_MMCR0, mmcr0);
- }
+ mtspr(SPRN_MMCR0, mmcr0);
}
static int pfm_ppc32_probe_pmu(void)
@@ -154,17 +154,17 @@ static int pfm_ppc32_probe_pmu(void)
intsok = 1;
break;
default:
- PFM_INFO("Unknown PVR_VER(0x%x)\n",PVR_VER(pvr));
+ PFM_INFO("Unknown PVR_VER(0x%x)\n", PVR_VER(pvr));
return -1;
}
/*
* deconfigure unimplemented registers
*/
- for(i=npmds; i < PFM_PM_NUM_PMDS; i++)
+ for (i = npmds; i < PFM_PM_NUM_PMDS; i++)
pfm_ppc32_pmd_desc[i].type = PFM_REG_NA;
- for(i=nmmcr; i < PFM_PM_NUM_PMCS; i++)
+ for (i = nmmcr; i < PFM_PM_NUM_PMCS; i++)
pfm_ppc32_pmc_desc[i].type = PFM_REG_NA;
/*
@@ -189,7 +189,7 @@ static struct pfm_pmu_config pfm_ppc32_p
.flags = PFM_PMU_BUILTIN_FLAG,
.owner = THIS_MODULE,
.version = "0.1",
- .arch_info = &pfm_ppc32_pmu_info
+ .arch_info = &pfm_ppc32_pmu_info,
};
static int __init pfm_ppc32_pmu_init_module(void)
@@ -199,8 +199,8 @@ static int __init pfm_ppc32_pmu_init_mod
static void __exit pfm_ppc32_pmu_cleanup_module(void)
{
- release_pmc_hardware();
- pfm_pmu_unregister(&pfm_ppc32_pmu_conf);
+ release_pmc_hardware();
+ pfm_pmu_unregister(&pfm_ppc32_pmu_conf);
}
module_init(pfm_ppc32_pmu_init_module);
Index: linux-2.6.20-arnd3-perfmon/include/asm-powerpc/perfmon.h
===================================================================
--- linux-2.6.20-arnd3-perfmon.orig/include/asm-powerpc/perfmon.h
+++ linux-2.6.20-arnd3-perfmon/include/asm-powerpc/perfmon.h
@@ -5,7 +5,7 @@
* Copyright (c) 2005 Hewlett-Packard Development Company, L.P.
* Contributed by Stephane Eranian <[EMAIL PROTECTED]>
*
- * This file contains ppc64 specific definitions for the perfmon
+ * This file contains powerpc specific definitions for the perfmon
* interface.
*
* This file MUST never be included directly. Use linux/perfmon.h.
@@ -23,9 +23,9 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
* 02111-1307 USA
- */
-#ifndef _ASM_PPC64_PERFMON_H_
-#define _ASM_PPC64_PERFMON_H_
+ */
+#ifndef _ASM_POWERPC_PERFMON_H_
+#define _ASM_POWERPC_PERFMON_H_
#ifdef __KERNEL__
@@ -51,14 +51,13 @@ struct pfm_arch_pmu_info {
#define PFM_ARCH_PMD_STK_ARG 8 /* conservative value */
#define PFM_ARCH_PMC_STK_ARG 8 /* conservative value */
#endif
-
+
static inline void pfm_arch_resend_irq(void)
{}
static inline void pfm_arch_serialize(void)
{}
-
static inline void pfm_arch_unfreeze_pmu(void)
{}
@@ -73,7 +72,7 @@ static inline void pfm_arch_write_pmc(st
if (ctx && (ctx->flags.started == 0))
return;
- switch(pfm_pmu_conf->pmc_desc[cnum].hw_addr) {
+ switch (pfm_pmu_conf->pmc_desc[cnum].hw_addr) {
case SPRN_MMCR0:
mtspr(SPRN_MMCR0, value);
break;
@@ -85,9 +84,9 @@ static inline void pfm_arch_write_pmc(st
mtspr(SPRN_MMCRA, value);
break;
#else
- case SPRN_MMCR2:
- mtspr(SPRN_MMCR2, value);
- break;
+ case SPRN_MMCR2:
+ mtspr(SPRN_MMCR2, value);
+ break;
#endif
default:
BUG();
@@ -96,7 +95,7 @@ static inline void pfm_arch_write_pmc(st
static inline u64 pfm_arch_read_pmc(struct pfm_context *ctx, unsigned int cnum)
{
- switch(pfm_pmu_conf->pmc_desc[cnum].hw_addr) {
+ switch (pfm_pmu_conf->pmc_desc[cnum].hw_addr) {
case SPRN_MMCR0:
return mfspr(SPRN_MMCR0);
case SPRN_MMCR1:
@@ -105,21 +104,20 @@ static inline u64 pfm_arch_read_pmc(stru
case SPRN_MMCRA:
return mfspr(SPRN_MMCRA);
#else
- case SPRN_MMCR2:
- return mfspr(SPRN_MMCR2);
+ case SPRN_MMCR2:
+ return mfspr(SPRN_MMCR2);
#endif
default:
BUG();
}
}
-
static inline void pfm_arch_write_pmd(struct pfm_context *ctx,
unsigned int cnum, u64 value)
{
- value &= pfm_pmu_conf->ovfl_mask;
+ value &= pfm_pmu_conf->ovfl_mask;
- switch(pfm_pmu_conf->pmd_desc[cnum].hw_addr) {
+ switch (pfm_pmu_conf->pmd_desc[cnum].hw_addr) {
case SPRN_PMC1:
mtspr(SPRN_PMC1, value);
break;
@@ -153,7 +151,7 @@ static inline void pfm_arch_write_pmd(st
static inline u64 pfm_arch_read_pmd(struct pfm_context *ctx, unsigned int cnum)
{
- switch(pfm_pmu_conf->pmd_desc[cnum].hw_addr) {
+ switch (pfm_pmu_conf->pmd_desc[cnum].hw_addr) {
case SPRN_PMC1:
return mfspr(SPRN_PMC1);
case SPRN_PMC2:
@@ -185,9 +183,7 @@ static inline u64 pfm_arch_read_pmd(stru
static inline void pfm_arch_ovfl_reset_pmd(struct pfm_context *ctx,
unsigned int cnum)
{
- u64 val;
-
- val = pfm_arch_read_pmd(ctx, cnum);
+ u64 val = pfm_arch_read_pmd(ctx, cnum);
/* This masks out overflow bit 31 */
pfm_arch_write_pmd(ctx, cnum, val);
@@ -213,11 +209,13 @@ static inline void pfm_arch_ctxswout_sys
{}
static inline void pfm_arch_ctxswin_sys(struct task_struct *task,
- struct pfm_context *ctx, struct pfm_event_set *set)
+ struct pfm_context *ctx,
+ struct pfm_event_set *set)
{}
static inline void pfm_arch_ctxswin_thread(struct task_struct *task,
- struct pfm_context *ctx, struct pfm_event_set *set)
+ struct pfm_context *ctx,
+ struct pfm_event_set *set)
{}
void pfm_arch_init_percpu(void);
@@ -273,7 +271,8 @@ static inline int pfm_arch_context_initi
return 0;
}
-static inline void pfm_arch_unload_context(struct pfm_context *ctx, struct
task_struct *task)
+static inline void pfm_arch_unload_context(struct pfm_context *ctx,
+ struct task_struct *task)
{}
/*
@@ -322,7 +321,7 @@ struct pfm_arch_context {
/* empty */
};
-#define PFM_ARCH_CTX_SIZE sizeof(struct pfm_arch_context)
+#define PFM_ARCH_CTX_SIZE sizeof(struct pfm_arch_context)
#endif /* __KERNEL__ */
-#endif /* _ASM_PPC64_PERFMON_H_ */
+#endif /* _ASM_POWERPC_PERFMON_H_ */
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