Alex,
On Mon, Aug 13, 2007 at 11:19:05PM -0700, Alex Shye wrote:
>
> So I was just messing around with the old version of things using CentOS4
> with perfmon-3.2-070206 and 2.6.20 kernel and seem to have something *close*
> to working for PEBS+event counters. Similar to your previous workaround
> with perfmon-3.2-070725 and the 2.6.22 kernel, I went ahead and modified the
> register types to what seemed to be the most generic. I also implemented a
> cheap hack in which I call dispatch a 2nd time with the PEBS event, plus the
> other event counters, and then merge the events together (I guess this won't
> work all of the time based upon your last email). The changes are here:
>
> arch/x86_64/perfmon/perfmon_core.c:
> -------------------------------------------------------------------------------
> static struct pfm_reg_desc pfm_core_pmc_desc[]={
> *** modified /* pmc0 */ { .type = PFM_REG_I,
> --> to /* pmc0 */ { .type = PFM_REG_I64,
No, you want plain REG_I
> .desc = "GLOBAL_CTRL",
> .dfl_val = 0,
> .rsvd_msk = 0xfffffff8fffffffcULL,
> .no_emul64_msk = 0,
> .hw_addr = MSR_CORE_PERF_GLOBAL_CTRL
> },
> *** modified /* pmc1 */ { .type = PFM_REG_I,
> --> to /* pmc1 */ { .type = PFM_REG_I64,
No, you want to keep REG_I
> .desc = "PEBS_ENABLE",
> .dfl_val = 0,
> .rsvd_msk = 0xfffffffffffffffeULL,
> .no_emul64_msk = 0,
> .hw_addr = MSR_IA32_PEBS_ENABLE
> },
> ***modified /* pmc2 */ { .type = PFM_REG_W,
> --> to /* pmc2 */ { .type = PFM_REG_I64,
No, you want to use REG_I
> .desc = "FIXED_CTRL",
> .dfl_val = 0x888ULL,
> .rsvd_msk = 0xfffffffffffff444ULL,
> .no_emul64_msk = 0,
> .hw_addr = MSR_CORE_PERF_FIXED_CTR_CTRL
> },
> /* pmc3 */ PMX_NA,
> /* pmc4 */ {
> .type = PFM_REG_I64,
> .desc = "PERFEVTSEL0",
> .dfl_val = PFM_CORE_PMC_VAL,
> .rsvd_msk = PFM_CORE_PMC_RSVD,
> .no_emul64_msk = PFM_CORE_NO64,
> .hw_addr = MSR_P6_EVNTSEL0
> },
> /* pmc5 */ {
> *** modified .type = PFM_REG_W64,
> --> to .type = PFM_REG_I64,
Yes.
> .desc = "PERFEVTSEL1",
> .dfl_val = PFM_CORE_PMC_VAL,
> .rsvd_msk = PFM_CORE_PMC_RSVD,
> .no_emul64_msk = PFM_CORE_NO64,
> .hw_addr = MSR_P6_EVNTSEL1
> }
> };
>
> This seems to be *close* to what is needed. I am able to use PEBS on
> MEM_LOAD_RETIRED:L2_MISS while counting INSTRUCTIONS_RETIRED and
> UNHALTED_CLOCK_CYCLES. However, if I change to another event, such as
> EXT_SNOOP.HITM, I am not able call pfm_dispatch with
> MEM_LOAD_RETIRED:L2_MISS and EXT_SNOOP:HITM. Is doesn't seem that this
> limitation should exist since they use different sets of counters. I think
> that it may be due to how I set the types for the PFM_REGs. I will fiddle
> with it but could you let me know if some of those REG.types obviously don't
> make sense to you??
>
I think you may hit a libpfm bug with event assignment on Intel Core.
I remember fixing something in this area, not quite sure if this is
exactly what you are seeing. But this combination of MEM_LOAD_RETIRED:L2_MISS
and EXT_SNOOP:HITM
works for me with the latest libpfm.
--
-Stephane
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