William Cohen wrote:
Hi,
I was playing around with the events this afternoon to find out what
kind of TLB miss rates I was getting on my machine. I found a couple of
typos amd64_events.h in libpfm cvs. Attached is a patch that correct the
TLB event names and descriptions.
-Will
Let's try that again with the correct file. -Will
? tlb_transpose.diff
Index: lib/amd64_events.h
===================================================================
RCS file: /cvsroot/perfmon2/libpfm/lib/amd64_events.h,v
retrieving revision 1.6
diff -U2 -u -r1.6 amd64_events.h
--- lib/amd64_events.h 5 Jun 2007 20:07:58 -0000 1.6
+++ lib/amd64_events.h 13 Sep 2007 21:03:07 -0000
@@ -271,11 +271,11 @@
}
},
-/* 14 */{.pme_name = "L1_DTLB_MISS_AND_L2_DLTB_HIT",
+/* 14 */{.pme_name = "L1_DTLB_MISS_AND_L2_DTLB_HIT",
.pme_code = 0x45,
- .pme_desc = "L1 DTLB Miss and L2 DLTB Hit"
+ .pme_desc = "L1 DTLB Miss and L2 DTLB Hit"
},
-/* 15 */{.pme_name = "L1_DTLB_AND_L2_DLTB_MISS",
+/* 15 */{.pme_name = "L1_DTLB_AND_L2_DTLB_MISS",
.pme_code = 0x46,
- .pme_desc = "L1 DTLB and L2 DLTB Miss"
+ .pme_desc = "L1 DTLB and L2 DTLB Miss"
},
/* 16 */{.pme_name = "MISALIGNED_ACCESSES",
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