Dan Sugalski <[EMAIL PROTECTED]> wrote: > At 11:39 AM +0100 11/5/04, Leopold Toetsch wrote: >>The cache misses are basically in two places >> >>a) accessing a new register frame and context >>b) during DOD/GC
> b) is relatively easy -- I'd bet that the vast majority of the cache > misses are because of the copying collector. Which copying collector? We have one for buffer memory. That isn't even triggered. Please (re)read the thread. It's all during M&S sweep phase. And there are details, where the misses are ... [ ... ] > If, generally speaking, invoking something gets you a new interpreter > structure That's cache-wise worse then the current scheme and doesn't address the cache issues at all, sorry. The interpreter structure is bigger then a register frame so it'll blow caches more. leo
