From ac3a0b6be0d272abbb41f446a3de2a7625ddcb43 Mon Sep 17 00:00:00 2001 From: Salvatore Dipietro Date: Tue, 29 Apr 2025 14:01:27 -0700 Subject: [PATCH] Remove Instruction Synchronization Barrier in spin_delay() for ARM64 architecture --- src/include/storage/s_lock.h | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h index 2f73f9fcf57a..e1e01b94fe68 100644 --- a/src/include/storage/s_lock.h +++ b/src/include/storage/s_lock.h @@ -274,16 +274,7 @@ tas(volatile slock_t *lock) #define SPIN_DELAY() spin_delay() static __inline__ void -spin_delay(void) -{ - /* - * Using an ISB instruction to delay in spinlock loops appears beneficial - * on high-core-count ARM64 processors. It seems mostly a wash for smaller - * gear, and ISB doesn't exist at all on pre-v7 ARM chips. - */ - __asm__ __volatile__( - " isb; \n"); -} +spin_delay(void){} #endif /* __aarch64__ */ #endif /* HAVE_GCC__SYNC_INT32_TAS */ -- 2.49.0