On Wed, Dec 24, 2014 at 10:30:19AM +0100, Andres Freund wrote:
> On 2014-12-23 22:51:22 -0500, Bruce Momjian wrote:
> > Many of these are 64-byte aligned, including Buffer Descriptors.
> In that case you need to change max_connections, some settings will lead
> to unaligned BufferDescriptors.

Well, isn't my second patch that misaligns the buffers sufficient for

> > I tested pgbench with these commands:
> > 
> >     $ pgbench -i -s 95 pgbench
> >     $ pgbench -S -c 95 -j 95 -t 100000 pgbench
> > 
> > on a 16-core Xeon server and got 84k tps.  I then applied another patch,
> > attached, which causes all the structures to be non-64-byte aligned, but
> > got the same tps number.
> 'Xeon' itself doesn't say much. It's been applied to widly different
> CPUs over the years. I guess that was a single socket server? You're
> much more likely to see significant problems on a multi node NUMA
> servers where the penalties for cache misses/false sharing are a
> magnitude or three higher.

Sorry, the server has 2 x Intel Xeon E5620 2.4GHz Quad-Core Processors;
the full details are here:


> > Can someone test these patches on an AMD CPU and see if you see a
> > difference?  Thanks.
> I don't think you'll see a bigger difference there.

Uh, I thought AMD showed a huge difference for misalignment:


and that email is from you.

I ended up running pgbench using 16-scale and got 90k tps:

        pgbench -S -c 16 -j 16 -t 100000 pgbench

but again could not see any difference between aligned and misaligned.

  Bruce Momjian  <br...@momjian.us>        http://momjian.us
  EnterpriseDB                             http://enterprisedb.com

  + Everyone has their own god. +

Sent via pgsql-hackers mailing list (pgsql-hackers@postgresql.org)
To make changes to your subscription:

Reply via email to