Gavin Sherry <[EMAIL PROTECTED]> writes:
> Interesting. On Xeon (2 phys, 4 log), with LWLock padded to 64 bytes and
> the cmpb/jump removed I get:
> [ 1 55s 2 69s 4 128s ]
> This compares to the following, which is unpadded but has cmpb/jump
> removed but is otherwise vanilla:
> 1: 55: 2: 111: 4: 207
Hmm, that's pretty significant. I tried it on a Xeon EM64T (thanks to
Stephen Frost for providing access), also 2 phys 4 log, and get:
Yesterday's CVS tip:
1 32s 2 46s 4 88s 8 168s
plus no-cmpb and spindelay2:
1 32s 2 48s 4 100s 8 177s
plus just-committed code to pad LWLock to 32:
1 33s 2 50s 4 98s 8 179s
alter to pad to 64:
1 33s 2 38s 4 108s 8 180s
I don't know what to make of the 2-process time going down while
4-process goes up; that seems just weird. But both numbers are
repeatable.
regards, tom lane
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