On Wed, Apr 26, 2006 at 05:37:31PM -0500, Jim C. Nasby wrote: > On Wed, Apr 26, 2006 at 06:16:46PM -0400, Bruce Momjian wrote: > > AMD transfers the dirty cache line directly from cpu to cpu. I can > > imaging that helping our test-and-set shared memory usage quite a bit. > Wasn't the whole point of test-and-set that it's the recommended way to > do lightweight spinlocks according to AMD/Intel? You'd think they'd have > a way to make that performant on multiple CPUs (though if it's relying > on possibly modifying an underlying data page I can't really think of > how to do that without snaking through the cache...)
It's expensive no matter what. One method might be less expensive than another. :-) AMD definately seems to have things right for lowest absolute latency. 2X still sounds like an extreme case - but until I've actually tried a very large, or thread intensive PostgreSQL db on both, I probably shouldn't doubt the work of others too much. :-) Cheers, mark -- [EMAIL PROTECTED] / [EMAIL PROTECTED] / [EMAIL PROTECTED] __________________________ . . _ ._ . . .__ . . ._. .__ . . . .__ | Neighbourhood Coder |\/| |_| |_| |/ |_ |\/| | |_ | |/ |_ | | | | | | \ | \ |__ . | | .|. |__ |__ | \ |__ | Ottawa, Ontario, Canada One ring to rule them all, one ring to find them, one ring to bring them all and in the darkness bind them... http://mark.mielke.cc/ ---------------------------(end of broadcast)--------------------------- TIP 9: In versions below 8.0, the planner will ignore your desire to choose an index scan if your joining column's datatypes do not match