Le 21/09/2014 15:56, Heow Goodman a écrit :
Perhaps like the 144-core forth chip:
I had a somewhat similar thought…
Without going as far as that (the F18A is a very special core — unclocked, 18
bits words, … — and as such very small and low power), I think considering
specialized synchronous communication channels (and if needed expanding picolisp
to support them) would be a good idea.
Those channels could be used either for communication between two cores on the
same chip, or between a core and some off-chip material.
By using the same communication channels and protocols to access either another
core or some off-chip DSP/ADC/whatever, it allows for the possibility of
transparent distributed computing by simply plugging an adapter (wired or
wireless) to the communication channel!
In case of embedded mobile applications, it could allow:
- remote control/code update (just add/configure the correct communication
device on the PC, start pil +, and hack away!);
- offloading of heavy computation (again, either to another PilCMU, or a PC);