On Tue, Jul 13, 2010 at 10:56:25AM +0100, Alan Cox wrote: > From: Alek Du <[email protected]> > > Moorestown has PMIC chip which contains GPIO blocks. The PMIC chip is > connected to Langwell by SPI interface. So this GPIO driver will be regarded > as SPI GPIO expander though the actual GPIO access is through IPC and SRAM. > The SPI master contoller will probe this device driver by parsing SPIB table. > > Cleaned up for new IPC, GPE removed and some printk and other tidying by > Alan Cox. Fixes for points noted by Matthew Garrett
Applied with some whitespace cleanup. -- Matthew Garrett | [email protected] -- To unsubscribe from this list: send the line "unsubscribe platform-driver-x86" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
