Author: arekm Date: Mon Jul 11 16:08:22 2011 GMT
Module: packages Tag: HEAD
---- Log message:
- update
---- Files affected:
packages/gcc:
gcc-branch.diff (1.47 -> 1.48)
---- Diffs:
================================================================
Index: packages/gcc/gcc-branch.diff
diff -u packages/gcc/gcc-branch.diff:1.47 packages/gcc/gcc-branch.diff:1.48
--- packages/gcc/gcc-branch.diff:1.47 Wed Jul 6 21:25:22 2011
+++ packages/gcc/gcc-branch.diff Mon Jul 11 18:04:11 2011
@@ -1,7 +1,7 @@
Index: configure
===================================================================
---- configure (.../tags/gcc_4_6_1_release) (wersja 175929)
-+++ configure (.../branches/gcc-4_6-branch) (wersja 175929)
+--- configure (.../tags/gcc_4_6_1_release) (wersja 176160)
++++ configure (.../branches/gcc-4_6-branch) (wersja 176160)
@@ -2705,9 +2705,8 @@
# these libraries are built for the target environment, and are built after
@@ -148,8 +148,8 @@
# is now the case.
Index: Makefile.in
===================================================================
---- Makefile.in (.../tags/gcc_4_6_1_release) (wersja 175929)
-+++ Makefile.in (.../branches/gcc-4_6-branch) (wersja 175929)
+--- Makefile.in (.../tags/gcc_4_6_1_release) (wersja 176160)
++++ Makefile.in (.../branches/gcc-4_6-branch) (wersja 176160)
@@ -966,7 +966,6 @@
maybe-configure-target-libtermcap \
maybe-configure-target-winsup \
@@ -821,8 +821,8 @@
Index: gcc/doc/invoke.texi
===================================================================
---- gcc/doc/invoke.texi (.../tags/gcc_4_6_1_release) (wersja 175929)
-+++ gcc/doc/invoke.texi (.../branches/gcc-4_6-branch) (wersja 175929)
+--- gcc/doc/invoke.texi (.../tags/gcc_4_6_1_release) (wersja 176160)
++++ gcc/doc/invoke.texi (.../branches/gcc-4_6-branch) (wersja 176160)
@@ -611,7 +611,8 @@
-momit-leaf-frame-pointer -mno-red-zone -mno-tls-direct-seg-refs @gol
-mcmodel=@var{code-model} -mabi=@var{name} @gol
@@ -848,15 +848,15 @@
These @samp{-m} switches are supported in addition to the above
Index: gcc/DATESTAMP
===================================================================
---- gcc/DATESTAMP (.../tags/gcc_4_6_1_release) (wersja 175929)
-+++ gcc/DATESTAMP (.../branches/gcc-4_6-branch) (wersja 175929)
+--- gcc/DATESTAMP (.../tags/gcc_4_6_1_release) (wersja 176160)
++++ gcc/DATESTAMP (.../branches/gcc-4_6-branch) (wersja 176160)
@@ -1 +1 @@
-20110627
-+20110706
++20110711
Index: gcc/reorg.c
===================================================================
---- gcc/reorg.c (.../tags/gcc_4_6_1_release) (wersja 175929)
-+++ gcc/reorg.c (.../branches/gcc-4_6-branch) (wersja 175929)
+--- gcc/reorg.c (.../tags/gcc_4_6_1_release) (wersja 176160)
++++ gcc/reorg.c (.../branches/gcc-4_6-branch) (wersja 176160)
@@ -2152,7 +2152,7 @@
/* This must be an INSN or CALL_INSN. */
pat = PATTERN (trial);
@@ -896,15 +896,83 @@
Index: gcc/DEV-PHASE
===================================================================
---- gcc/DEV-PHASE (.../tags/gcc_4_6_1_release) (wersja 175929)
-+++ gcc/DEV-PHASE (.../branches/gcc-4_6-branch) (wersja 175929)
+--- gcc/DEV-PHASE (.../tags/gcc_4_6_1_release) (wersja 176160)
++++ gcc/DEV-PHASE (.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1 @@
+prerelease
Index: gcc/ChangeLog
===================================================================
---- gcc/ChangeLog (.../tags/gcc_4_6_1_release) (wersja 175929)
-+++ gcc/ChangeLog (.../branches/gcc-4_6-branch) (wersja 175929)
-@@ -1,3 +1,214 @@
+--- gcc/ChangeLog (.../tags/gcc_4_6_1_release) (wersja 176160)
++++ gcc/ChangeLog (.../branches/gcc-4_6-branch) (wersja 176160)
+@@ -1,3 +1,282 @@
++2011-07-11 Georg-Johann Lay <[email protected]>
++
++ PR target/39633
++ Backport from mainline r176141
++ 2011-07-11 Georg-Johann Lay
++ * config/avr/avr.c (notice_update_cc): For ashiftrt:QI, only
++ offsets 1..5 set cc0 in a usable way.
++
++2011-07-08 Jakub Jelinek <[email protected]>
++
++ PR target/49621
++ * config/rs6000/rs6000.c (rs6000_emit_vector_cond_expr): Use
++ CONST0_RTX (dest_mode) instead of const0_rtx as second operand
++ of NE.
++ * config/rs6000/vector.md (vector_select_<mode>,
++ vector_select_<mode>_uns): Change second operand of NE to
++ CONST0_RTX (<MODE>mode) instead of const0_rtx.
++ * config/rs6000/altivec.md (*altivec_vsel<mode>,
++ *altivec_vsel<mode>_uns): Expect second operand of NE to be
++ zero_constant of the corresponding vector mode.
++ * config/rs6000/vsx.md (*vsx_xxsel<mode>, *vsx_xxsel<mode>_uns):
++ Likewise.
++
++2011-07-08 Georg-Johann Lay <[email protected]>
++
++ PR target/46779
++ Backport from mainline SVN 176053.
++ 2011-07-08 Georg-Johann Lay <[email protected]>
++ * config/avr/avr.c (avr_hard_regno_mode_ok): Rewrite.
++ In particular, allow 8-bit values in r28 and r29.
++ (avr_hard_regno_scratch_ok): Disallow any register that might be
++ part of the frame pointer.
++ (avr_hard_regno_rename_ok): Same.
++ (avr_legitimate_address_p): Don't allow SUBREGs.
++
++2011-07-07 Eric Botcazou <[email protected]>
++
++ PR target/49660
++ * config/sparc/sol2.h [TARGET_64BIT_DEFAULT] (TARGET_DEFAULT): Add
++ MASK_V8PLUS, remove commented out flag and reorder.
++
++ Backport from mainline
++ 2011-06-28 Rainer Orth <[email protected]>
++
++ * config/sparc/sol2-64.h (TARGET_DEFAULT): Remove.
++ (TARGET_64BIT_DEFAULT): Define.
++ * config.gcc (sparc*-*-solaris2*): Move sparc/sol2-64.h to front
++ of tm_file.
++ * config/sparc/sol2.h [TARGET_64BIT_DEFAULT] (TARGET_DEFAULT): Define.
++
++2011-07-07 Jakub Jelinek <[email protected]>
++
++ PR c/49644
++ * c-typeck.c (build_binary_op): For MULT_EXPR and TRUNC_DIV_EXPR with
++ one non-complex and one complex argument, call c_save_expr on both
++ operands.
++
++ PR debug/49522
++ * df-problems.c (dead_debug_reset): Remove dead_debug_uses
++ referencing debug insns that have been reset.
++ (dead_debug_insert_before): Don't assert reg is non-NULL,
++ instead return immediately if it is NULL.
++
++ PR middle-end/49640
++ * gimplify.c (gimplify_compound_lval): For last 2 ARRAY_*REF
++ operands and last COMPONENT_REF operand call gimplify_expr on it
++ if non-NULL.
++
+2011-07-06 Ramana Radhakrishnan <[email protected]>
+
+ Backport from mainline.
@@ -1121,8 +1189,8 @@
* GCC 4.6.1 released.
Index: gcc/testsuite/gcc.target/arm/scd42-3.c
===================================================================
---- gcc/testsuite/gcc.target/arm/scd42-3.c (.../tags/gcc_4_6_1_release)
(wersja 175929)
-+++ gcc/testsuite/gcc.target/arm/scd42-3.c (.../branches/gcc-4_6-branch)
(wersja 175929)
+--- gcc/testsuite/gcc.target/arm/scd42-3.c (.../tags/gcc_4_6_1_release)
(wersja 176160)
++++ gcc/testsuite/gcc.target/arm/scd42-3.c (.../branches/gcc-4_6-branch)
(wersja 176160)
@@ -1,6 +1,7 @@
/* Verify that ldr is preferred on XScale for loading a 3 or 4 byte constant.
*/
/* { dg-do compile } */
@@ -1134,8 +1202,8 @@
unsigned load4(void) __attribute__ ((naked));
Index: gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c
===================================================================
---- gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c
(.../tags/gcc_4_6_1_release) (wersja 175929)
-+++ gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c
(.../branches/gcc-4_6-branch) (wersja 175929)
+--- gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c
(.../tags/gcc_4_6_1_release) (wersja 176160)
++++ gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -1,7 +1,7 @@
/* { dg-do compile } */
-/* { dg-require-effective-target arm_neon_fp16_ok } */
@@ -1148,8 +1216,8 @@
Index: gcc/testsuite/gcc.target/arm/pr42879.c
===================================================================
---- gcc/testsuite/gcc.target/arm/pr42879.c (.../tags/gcc_4_6_1_release)
(wersja 175929)
-+++ gcc/testsuite/gcc.target/arm/pr42879.c (.../branches/gcc-4_6-branch)
(wersja 175929)
+--- gcc/testsuite/gcc.target/arm/pr42879.c (.../tags/gcc_4_6_1_release)
(wersja 176160)
++++ gcc/testsuite/gcc.target/arm/pr42879.c (.../branches/gcc-4_6-branch)
(wersja 176160)
@@ -1,4 +1,5 @@
-/* { dg-options "-march=armv7-a -mthumb -Os" } */
+/* { dg-require-effective-target arm_thumb2_ok } */
@@ -1159,8 +1227,8 @@
struct A
Index: gcc/testsuite/gcc.target/arm/ctz.c
===================================================================
---- gcc/testsuite/gcc.target/arm/ctz.c (.../tags/gcc_4_6_1_release) (wersja
175929)
-+++ gcc/testsuite/gcc.target/arm/ctz.c (.../branches/gcc-4_6-branch) (wersja
175929)
+--- gcc/testsuite/gcc.target/arm/ctz.c (.../tags/gcc_4_6_1_release) (wersja
176160)
++++ gcc/testsuite/gcc.target/arm/ctz.c (.../branches/gcc-4_6-branch) (wersja
176160)
@@ -1,6 +1,6 @@
/* { dg-do compile } */
-/* { dg-require-effective-target arm32 } */
@@ -1172,8 +1240,8 @@
{
Index: gcc/testsuite/gcc.target/arm/thumb-bitfld1.c
===================================================================
---- gcc/testsuite/gcc.target/arm/thumb-bitfld1.c
(.../tags/gcc_4_6_1_release) (wersja 175929)
-+++ gcc/testsuite/gcc.target/arm/thumb-bitfld1.c
(.../branches/gcc-4_6-branch) (wersja 175929)
+--- gcc/testsuite/gcc.target/arm/thumb-bitfld1.c
(.../tags/gcc_4_6_1_release) (wersja 176160)
++++ gcc/testsuite/gcc.target/arm/thumb-bitfld1.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -1,5 +1,6 @@
/* { dg-do compile } */
-/* { dg-options "-O1 -mthumb -march=armv5t" } */
@@ -1184,8 +1252,8 @@
{
Index: gcc/testsuite/gcc.target/arm/stack-corruption.c
===================================================================
---- gcc/testsuite/gcc.target/arm/stack-corruption.c
(.../tags/gcc_4_6_1_release) (wersja 175929)
-+++ gcc/testsuite/gcc.target/arm/stack-corruption.c
(.../branches/gcc-4_6-branch) (wersja 175929)
+--- gcc/testsuite/gcc.target/arm/stack-corruption.c
(.../tags/gcc_4_6_1_release) (wersja 176160)
++++ gcc/testsuite/gcc.target/arm/stack-corruption.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -1,4 +1,5 @@
/* { dg-do compile } */
+/* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
@@ -1194,8 +1262,8 @@
int main() {
Index: gcc/testsuite/gcc.target/arm/pr40482.c
===================================================================
---- gcc/testsuite/gcc.target/arm/pr40482.c (.../tags/gcc_4_6_1_release)
(wersja 175929)
-+++ gcc/testsuite/gcc.target/arm/pr40482.c (.../branches/gcc-4_6-branch)
(wersja 175929)
+--- gcc/testsuite/gcc.target/arm/pr40482.c (.../tags/gcc_4_6_1_release)
(wersja 176160)
++++ gcc/testsuite/gcc.target/arm/pr40482.c (.../branches/gcc-4_6-branch)
(wersja 176160)
@@ -1,3 +1,4 @@
+/* { dg-skip-if "" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */
/* { dg-options "-mthumb -Os" } */
@@ -1203,8 +1271,8 @@
Index: gcc/testsuite/gcc.target/arm/pr45701-3.c
===================================================================
---- gcc/testsuite/gcc.target/arm/pr45701-3.c (.../tags/gcc_4_6_1_release)
(wersja 175929)
-+++ gcc/testsuite/gcc.target/arm/pr45701-3.c (.../branches/gcc-4_6-branch)
(wersja 175929)
+--- gcc/testsuite/gcc.target/arm/pr45701-3.c (.../tags/gcc_4_6_1_release)
(wersja 176160)
++++ gcc/testsuite/gcc.target/arm/pr45701-3.c (.../branches/gcc-4_6-branch)
(wersja 176160)
@@ -1,5 +1,6 @@
/* { dg-do compile } */
-/* { dg-options "-march=armv7-a -mthumb -Os" } */
@@ -1215,8 +1283,8 @@
Index: gcc/testsuite/gcc.target/arm/20031108-1.c
===================================================================
---- gcc/testsuite/gcc.target/arm/20031108-1.c (.../tags/gcc_4_6_1_release)
(wersja 175929)
-+++ gcc/testsuite/gcc.target/arm/20031108-1.c (.../branches/gcc-4_6-branch)
(wersja 175929)
+--- gcc/testsuite/gcc.target/arm/20031108-1.c (.../tags/gcc_4_6_1_release)
(wersja 176160)
++++ gcc/testsuite/gcc.target/arm/20031108-1.c (.../branches/gcc-4_6-branch)
(wersja 176160)
@@ -1,5 +1,6 @@
/* PR optimization/10467 */
/* { dg-do compile } */
@@ -1224,10 +1292,39 @@
/* { dg-options "-O2 -mthumb" } */
typedef enum {Ident_1} Enumeration;
+Index: gcc/testsuite/gcc.target/powerpc/altivec-34.c
+===================================================================
+--- gcc/testsuite/gcc.target/powerpc/altivec-34.c
(.../tags/gcc_4_6_1_release) (wersja 0)
++++ gcc/testsuite/gcc.target/powerpc/altivec-34.c
(.../branches/gcc-4_6-branch) (wersja 176160)
+@@ -0,0 +1,24 @@
++/* PR target/49621 */
++/* { dg-do compile } */
++/* { dg-options "-O2 -maltivec" } */
++
++#include <altivec.h>
++
++int
++foo (void)
++{
++ vector unsigned a, b, c;
++ unsigned k = 1;
++
++ a = (vector unsigned) { 0, 0, 0, 1 };
++ b = c = (vector unsigned) { 0, 0, 0, 0 };
++
++ a = vec_add (a, vec_splats (k));
++ b = vec_add (b, a);
++ c = vec_sel (c, a, b);
++
++ if (vec_any_eq (b, c))
++ return 1;
++
++ return 0;
++}
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-1.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -dp -mavx -mavx256-split-unaligned-load" } */
@@ -1251,7 +1348,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-3.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -dp -mavx -mavx256-split-unaligned-load" } */
@@ -1275,7 +1372,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-load-5.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-load-5.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-5.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-5.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,43 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx } */
@@ -1323,7 +1420,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-1.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -dp -mavx -mavx256-split-unaligned-store" } */
@@ -1350,7 +1447,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-load-7.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-load-7.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-7.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-7.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,60 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx } */
@@ -1415,7 +1512,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-3.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -dp -mavx -mavx256-split-unaligned-store" } */
@@ -1442,7 +1539,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-store-5.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-store-5.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-5.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-5.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,42 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx } */
@@ -1489,7 +1586,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-store-7.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-store-7.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-7.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-7.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,45 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx } */
@@ -1539,7 +1636,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-2.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
@@ -1573,7 +1670,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-4.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -dp -mavx -mno-avx256-split-unaligned-load
-mno-avx256-split-unaligned-store" } */
@@ -1597,7 +1694,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-load-6.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-load-6.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-6.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-load-6.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,42 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx } */
@@ -1644,7 +1741,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
@@ -1678,7 +1775,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-4.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -dp -mavx -mno-avx256-split-unaligned-load
-mno-avx256-split-unaligned-store" } */
@@ -1703,7 +1800,7 @@
Index: gcc/testsuite/gcc.target/i386/avx256-unaligned-store-6.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx256-unaligned-store-6.c
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-6.c
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-6.c
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,42 @@
+/* { dg-do run } */
+/* { dg-require-effective-target avx } */
@@ -1747,10 +1844,30 @@
+ if (b[i+3] != c[i+3])
+ abort ();
+}
+Index: gcc/testsuite/gcc.target/sparc/cas64.c
+===================================================================
+--- gcc/testsuite/gcc.target/sparc/cas64.c (.../tags/gcc_4_6_1_release)
(wersja 0)
++++ gcc/testsuite/gcc.target/sparc/cas64.c (.../branches/gcc-4_6-branch)
(wersja 176160)
+@@ -0,0 +1,15 @@
++/* PR target/49660 */
++
++/* { dg-do compile { target sparc*-*-solaris2.* } } */
++
++#include <stdint.h>
++
++extern int64_t *val, old, new;
++
++int
++cas64 (void)
++{
++ return __sync_bool_compare_and_swap (val, old, new);
++}
++
++/* { dg-final { scan-assembler-not "compare_and_swap_8" } } */
Index: gcc/testsuite/lib/scanasm.exp
===================================================================
---- gcc/testsuite/lib/scanasm.exp (.../tags/gcc_4_6_1_release) (wersja
175929)
-+++ gcc/testsuite/lib/scanasm.exp (.../branches/gcc-4_6-branch) (wersja
175929)
+--- gcc/testsuite/lib/scanasm.exp (.../tags/gcc_4_6_1_release) (wersja
176160)
++++ gcc/testsuite/lib/scanasm.exp (.../branches/gcc-4_6-branch) (wersja
176160)
@@ -50,16 +50,22 @@
}
}
@@ -1851,8 +1968,8 @@
} else {
Index: gcc/testsuite/lib/scandump.exp
===================================================================
---- gcc/testsuite/lib/scandump.exp (.../tags/gcc_4_6_1_release) (wersja
175929)
-+++ gcc/testsuite/lib/scandump.exp (.../branches/gcc-4_6-branch) (wersja
175929)
+--- gcc/testsuite/lib/scandump.exp (.../tags/gcc_4_6_1_release) (wersja
176160)
++++ gcc/testsuite/lib/scandump.exp (.../branches/gcc-4_6-branch) (wersja
176160)
@@ -55,7 +55,8 @@
set src [file tail [lindex $testcase 0]]
set output_file "[glob -nocomplain $src.[lindex $args 2]]"
@@ -1905,8 +2022,8 @@
Index: gcc/testsuite/lib/target-supports-dg.exp
===================================================================
---- gcc/testsuite/lib/target-supports-dg.exp (.../tags/gcc_4_6_1_release)
(wersja 175929)
-+++ gcc/testsuite/lib/target-supports-dg.exp (.../branches/gcc-4_6-branch)
(wersja 175929)
+--- gcc/testsuite/lib/target-supports-dg.exp (.../tags/gcc_4_6_1_release)
(wersja 176160)
++++ gcc/testsuite/lib/target-supports-dg.exp (.../branches/gcc-4_6-branch)
(wersja 176160)
@@ -172,6 +172,12 @@
if { [llength $args] < 1 || [llength $args] > 2 } {
error "syntax error, need a single effective-target keyword with
optional selector"
@@ -1930,8 +2047,8 @@
}
Index: gcc/testsuite/lib/target-supports.exp
===================================================================
---- gcc/testsuite/lib/target-supports.exp (.../tags/gcc_4_6_1_release)
(wersja 175929)
-+++ gcc/testsuite/lib/target-supports.exp (.../branches/gcc-4_6-branch)
(wersja 175929)
+--- gcc/testsuite/lib/target-supports.exp (.../tags/gcc_4_6_1_release)
(wersja 176160)
++++ gcc/testsuite/lib/target-supports.exp (.../branches/gcc-4_6-branch)
(wersja 176160)
@@ -1932,45 +1932,53 @@
# or -mfloat-abi=hard, but if one is already specified by the
# multilib, use it.
@@ -2030,7 +2147,7 @@
Index: gcc/testsuite/gfortran.dg/extends_14.f03
===================================================================
--- gcc/testsuite/gfortran.dg/extends_14.f03 (.../tags/gcc_4_6_1_release)
(wersja 0)
-+++ gcc/testsuite/gfortran.dg/extends_14.f03 (.../branches/gcc-4_6-branch)
(wersja 175929)
++++ gcc/testsuite/gfortran.dg/extends_14.f03 (.../branches/gcc-4_6-branch)
(wersja 176160)
@@ -0,0 +1,28 @@
+! { dg-do compile }
+! { dg-options "-fdump-tree-original" }
@@ -2063,7 +2180,7 @@
Index: gcc/testsuite/gfortran.dg/pr49472.f90
===================================================================
--- gcc/testsuite/gfortran.dg/pr49472.f90 (.../tags/gcc_4_6_1_release)
(wersja 0)
-+++ gcc/testsuite/gfortran.dg/pr49472.f90 (.../branches/gcc-4_6-branch)
(wersja 175929)
++++ gcc/testsuite/gfortran.dg/pr49472.f90 (.../branches/gcc-4_6-branch)
(wersja 176160)
@@ -0,0 +1,15 @@
+! PR rtl-optimization/49472
+! { dg-do compile }
@@ -2083,7 +2200,7 @@
Index: gcc/testsuite/gfortran.dg/pr49540-2.f90
===================================================================
--- gcc/testsuite/gfortran.dg/pr49540-2.f90 (.../tags/gcc_4_6_1_release)
(wersja 0)
-+++ gcc/testsuite/gfortran.dg/pr49540-2.f90 (.../branches/gcc-4_6-branch)
(wersja 175929)
++++ gcc/testsuite/gfortran.dg/pr49540-2.f90 (.../branches/gcc-4_6-branch)
(wersja 176160)
@@ -0,0 +1,17 @@
+! PR fortran/49540
+! { dg-do compile }
@@ -2102,10 +2219,73 @@
+ data l /4, 23 * 5, 6/
+ data l(2,:) /1, 3 * 2, 3/
+end block data
+Index: gcc/testsuite/gfortran.dg/intrinsic_signal.f90
+===================================================================
+--- gcc/testsuite/gfortran.dg/intrinsic_signal.f90
(.../tags/gcc_4_6_1_release) (wersja 0)
++++ gcc/testsuite/gfortran.dg/intrinsic_signal.f90
(.../branches/gcc-4_6-branch) (wersja 176160)
+@@ -0,0 +1,21 @@
++! { dg-do compile }
++!
++! PR fortran/49690
++!
++! Reduced test case, based on the one of Debian bug #631204
++!
++
++subroutine ctrlc_ast
++ common /xinterrupt/ interrupted
++ logical interrupted
++ interrupted = .true.
++end subroutine ctrlc_ast
++
++subroutine set_ctrl_c(ctrlc_ast)
++ external ctrlc_ast
++ intrinsic signal
++ integer old_handle
++ common /xinterrupt/ interrupted
++ logical interrupted
++ old_handler = signal(2, ctrlc_ast)
++end subroutine set_ctrl_c
+Index: gcc/testsuite/gfortran.dg/typebound_proc_23.f90
+===================================================================
+--- gcc/testsuite/gfortran.dg/typebound_proc_23.f90
(.../tags/gcc_4_6_1_release) (wersja 0)
++++ gcc/testsuite/gfortran.dg/typebound_proc_23.f90
(.../branches/gcc-4_6-branch) (wersja 176160)
+@@ -0,0 +1,32 @@
++! { dg-do run }
++!
++! PR 49562: [4.6/4.7 Regression] [OOP] assigning value to type-bound function
++!
++! Contributed by Hans-Werner Boschmann <[email protected]>
++
++module ice
++ type::ice_type
++ contains
++ procedure::ice_func
++ end type
++ integer, target :: it = 0
++contains
++ function ice_func(this)
++ integer, pointer :: ice_func
++ class(ice_type)::this
++ ice_func => it
++ end function ice_func
++ subroutine ice_sub(a)
++ class(ice_type)::a
++ a%ice_func() = 1
++ end subroutine ice_sub
++end module
++
++use ice
++type(ice_type) :: t
++if (it/=0) call abort()
++call ice_sub(t)
++if (it/=1) call abort()
++end
++
++! { dg-final { cleanup-modules "ice" } }
Index: gcc/testsuite/gfortran.dg/read_list_eof_1.f90
===================================================================
--- gcc/testsuite/gfortran.dg/read_list_eof_1.f90
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gfortran.dg/read_list_eof_1.f90
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gfortran.dg/read_list_eof_1.f90
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,22 @@
+! { dg-do run }
+! PR 49296 List formatted read of file without EOR marker (\n).
@@ -2132,7 +2312,7 @@
Index: gcc/testsuite/gfortran.dg/reshape_zerosize_3.f90
===================================================================
--- gcc/testsuite/gfortran.dg/reshape_zerosize_3.f90
(.../tags/gcc_4_6_1_release) (wersja 0)
-+++ gcc/testsuite/gfortran.dg/reshape_zerosize_3.f90
(.../branches/gcc-4_6-branch) (wersja 175929)
++++ gcc/testsuite/gfortran.dg/reshape_zerosize_3.f90
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -0,0 +1,43 @@
+! { dg-do run }
+! PR 49479 - this used not to print anything.
@@ -2179,8 +2359,8 @@
+! { dg-final { cleanup-modules "m1" } }
Index: gcc/testsuite/gfortran.dg/allocatable_scalar_9.f90
===================================================================
---- gcc/testsuite/gfortran.dg/allocatable_scalar_9.f90
(.../tags/gcc_4_6_1_release) (wersja 175929)
-+++ gcc/testsuite/gfortran.dg/allocatable_scalar_9.f90
(.../branches/gcc-4_6-branch) (wersja 175929)
+--- gcc/testsuite/gfortran.dg/allocatable_scalar_9.f90
(.../tags/gcc_4_6_1_release) (wersja 176160)
++++ gcc/testsuite/gfortran.dg/allocatable_scalar_9.f90
(.../branches/gcc-4_6-branch) (wersja 176160)
@@ -49,7 +49,7 @@
if(allocated(na4%b4)) call abort()
end
@@ -2193,7 +2373,7 @@
Index: gcc/testsuite/gfortran.dg/pr49540-1.f90
===================================================================
--- gcc/testsuite/gfortran.dg/pr49540-1.f90 (.../tags/gcc_4_6_1_release)
(wersja 0)
-+++ gcc/testsuite/gfortran.dg/pr49540-1.f90 (.../branches/gcc-4_6-branch)
(wersja 175929)
<<Diff was trimmed, longer than 597 lines>>
---- CVS-web:
http://cvs.pld-linux.org/cgi-bin/cvsweb.cgi/packages/gcc/gcc-branch.diff?r1=1.47&r2=1.48&f=u
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