Ramon van Handel wrote:
> I can use a similar system to the linux page allocation system. Make three
> arrays, one for one-byte allocations, one for two-byte allocations, and
> one for four-byte allocations. When a dword is out'd or in'd we start at the
> four-byte allocation array; if there is no four-byte allocation we split into
> two two-byte allocations and look into the next array, etc.
Sounds good.
>
> I forgot (don't have the intel docs in front of me now), but IIRC 4-byte
> in's/out's have to be aligned on a 4-byte boundary (in the I/O address space),
> right ? Or am I confused ?
Yep, word-size ports should be aligned on word boundaries,
dword-size ports on dword boundaries. Otherwise extra
bus-cycles are needed. It is legal to have unaligned
ports, but the extra bus-cycles to us I believe mean
that the IO accesses are decomposed into multiple IO
accesses.
Your strategy above should take care of this quite nicely.
-Kevin
