Hello All, I have installed POCL on the zedboard zynq. Currently the arm core is getting detected as an OPENCL device but now i want to make my FPGA detect as an opencl device. Im using xillybus architecture so my read and write ports to the FPGA are already mapped to /dev/ but how do i map it to POCL to make it detect when i use the OPENCL api’s. If anyone could help me or direct me in the right way, it would be great.
Thanks Prashant Ravi ------------------------------------------------------------------------------ _______________________________________________ pocl-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/pocl-devel
