There's been a problem with the multiprocessor code in Poly/ML on the
Sparc and I've traced this to some hand-coded assembly code. The
problem is that v9 processors appear to require memory barrier
instructions in the atomic increment and decrement instructions but
these instructions aren't implemented on earlier processors. That
really means that there have to be different versions of the code for v9
and for earlier processors.
There are various options for dealing with this requiring more or less
effort but I'd first like to have some idea of how much Sparc machines
are currently used. If they are used are these v9 processors or are
people still using v8/v7 processors?
David
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