CVSROOT: /cvs
Module name: ports
Changes by: [email protected] 2022/06/27 04:06:50
Log message:
import port/devel/riscv32-esp-elf, ok sthen@
The riscv32-esp-elf port is an ESP32 GNU cross compiler suite, configured
for
the riscv32-esp-elf target.
ESP32-C3 is a single-core Wi-Fi and Bluetooth 5 (LE) microcontroller SoC,
based
on the open-source RISC-V architecture. It strikes the right balance of
power,
I/O capabilities and security, thus offering the optimal cost-effective
solution
for connected devices. The availability of Wi-Fi and Bluetooth 5 (LE)
connectivity not only makes the device's configuration easy, but it also
facilitates a variety of use-cases based on dual connectivity.
Status:
Vendor Tag: tracey
Release Tags: tracey_20220627
N ports/devel/riscv32-esp-elf/Makefile.inc
N ports/devel/riscv32-esp-elf/Makefile
N ports/devel/riscv32-esp-elf/binutils/Makefile
N ports/devel/riscv32-esp-elf/binutils/distinfo
N ports/devel/riscv32-esp-elf/binutils/pkg/DESCR
N ports/devel/riscv32-esp-elf/binutils/pkg/PLIST
N ports/devel/riscv32-esp-elf/gcc/Makefile
N ports/devel/riscv32-esp-elf/gcc/distinfo
N ports/devel/riscv32-esp-elf/gcc/pkg/DESCR
N ports/devel/riscv32-esp-elf/gcc/pkg/PLIST
N ports/devel/riscv32-esp-elf/gcc-bootstrap/Makefile
N ports/devel/riscv32-esp-elf/gcc-bootstrap/distinfo
N ports/devel/riscv32-esp-elf/gcc-bootstrap/pkg/DESCR
N ports/devel/riscv32-esp-elf/gcc-bootstrap/pkg/PLIST
N ports/devel/riscv32-esp-elf/gdb/Makefile
N ports/devel/riscv32-esp-elf/gdb/distinfo
N ports/devel/riscv32-esp-elf/gdb/pkg/DESCR
N ports/devel/riscv32-esp-elf/gdb/pkg/PLIST
N ports/devel/riscv32-esp-elf/newlib/Makefile
N ports/devel/riscv32-esp-elf/newlib/distinfo
N ports/devel/riscv32-esp-elf/newlib/pkg/DESCR
N ports/devel/riscv32-esp-elf/newlib/pkg/PLIST
No conflicts created by this import
