CVSROOT: /cvs
Module name: ports
Changes by: [email protected] 2011/05/30 23:44:27
Modified files:
devel/py-cheetah: Makefile
devel/py-coverage: Makefile
devel/py-ctypes: Makefile
devel/py-dulwich: Makefile
devel/py-editdist: Makefile
devel/py-openbsd: Makefile
devel/py-protocols: Makefile
devel/py-py : Makefile
devel/py-radix : Makefile
devel/py-rcsparse: Makefile
devel/py-ruledispatch: Makefile
devel/py-silc : Makefile
devel/py-simplejson: Makefile
devel/py-twisted/core: Makefile
devel/py-urwid : Makefile
devel/py-zopeinterface: Makefile
Log message:
First ports I found which need Add WANTLIB += ${MODPY_WANTLIB}, bump revision.
ok sthen@.
