CVSROOT: /cvs
Module name: ports
Changes by: [email protected] 2015/05/18 23:33:39
Modified files:
devel/llvm : Makefile
devel/llvm/patches:
patch-lib_Target_Sparc_AsmParser_SparcAsmParser_cpp
patch-lib_Target_Sparc_Disassembler_SparcDisassembler_cpp
patch-lib_Target_Sparc_SparcInstr64Bit_td
patch-lib_Target_Sparc_SparcInstrAliases_td
patch-lib_Target_Sparc_SparcInstrFormats_td
patch-lib_Target_Sparc_SparcInstrInfo_td
patch-lib_Target_Sparc_SparcRegisterInfo_td
Added files:
devel/llvm/patches: patch-lib_Target_Sparc_SparcISelDAGToDAG_cpp
Log message:
Backport commits from upstream LLVM.
r237580
Add support for the Sparc implementation-defined "ASR" registers.
r237581
Sparc: Add the "alternate address space" load/store instructions.
- Adds support for the asm syntax, which has an immediate integer
"ASI" (address space identifier) appearing after an address, before
a comma.
- Adds the various-width load, store, and swap in alternate address
space instructions. (ldsba, ldsha, lduba, lduha, lda, stba, stha,
sta, swapa)
r237582
Sparc: Support PSR, TBR, WIM read/write instructions
from brad (maintainer)
