On Tue, Dec 01, 2020 at 12:28:24AM +0100, Charlene Wendling wrote: > Hi,
> > http://build-failures.rhaalovely.net/powerpc/2020-11-11/emulators/spike.log > > http://build-failures.rhaalovely.net/mips64/2020-11-22/emulators/spike.log > (sparc64 needs a COMPILER line) > I've just casted the unsigned long argument to uint32_t. Creating a > new overloaded swap() function seems redundant to me (correct me if > i'm wrong) and upstream code for fesvr/syscall.cc totally changed. > While here, i've added a COMPILER line for sparc64, that complains > about C++11. > This builds on macppc, but the runtime is wrong. Per upstream's readme: > (spike allocates 2GB by default, reduces to 100MB) > $ riscv64-unknown-elf-gcc hello.c -o hello > $ spike -l -m100 \ > /usr/local/riscv64-unknown-elf/riscv64-unknown-elf/bin/pk hello > [... lots of assembly ...] > core 0: exception trap_instruction_page_fault, epc 0x00000000800019c4 > I did not try an update to the latest GitHub sources. It would be better > for someone who really makes an extensive use of it to do the update. > This diff has been tested on amd64, where it works as expected. > Comments/feedback are welcome, > Charlène. This _does_ fix the build for sparc64. (I had tried the COMPILER line before but didn't have the patch. The two in combination are the answer). ok kmos --Kurt > > Index: Makefile > =================================================================== > RCS file: /cvs/ports/emulators/spike/Makefile,v > retrieving revision 1.3 > diff -u -p -u -p -r1.3 Makefile > --- Makefile 5 Nov 2020 08:35:16 -0000 1.3 > +++ Makefile 30 Nov 2020 23:07:12 -0000 > @@ -4,12 +4,14 @@ > # address space is not large enough > NOT_FOR_ARCHS = i386 > > +BROKEN-powerpc= internal 'exception trap_instruction_page_fault' at > runtime > + > COMMENT = RISC-V ISA simulator > > GH_COMMIT = ec6ded4f2f21cb7aef4a0b31b82b91ef91d22c36 > GH_ACCOUNT = riscv > GH_PROJECT = riscv-isa-sim > -REVISION = 0 > +REVISION = 1 > > DISTNAME = spike-1.0.0 > > @@ -21,6 +23,9 @@ MAINTAINER = Jasper Lievisse Adriaanse < > PERMIT_PACKAGE = Yes > > WANTLIB += ${COMPILER_LIBCXX} c m > + > +# C++11 > +COMPILER = base-clang ports-gcc > > BUILD_DEPENDS = devel/dtc > > Index: patches/patch-fesvr_syscall_cc > =================================================================== > RCS file: patches/patch-fesvr_syscall_cc > diff -N patches/patch-fesvr_syscall_cc > --- /dev/null 1 Jan 1970 00:00:00 -0000 > +++ patches/patch-fesvr_syscall_cc 30 Nov 2020 23:07:12 -0000 > @@ -0,0 +1,17 @@ > +$OpenBSD$ > + > +There is no overloaded function for swap(unsigned long). big endian archs > +fix for: riscv/byteorder.h:22:58: error: call to 'swap' is ambiguous > + > +Index: fesvr/syscall.cc > +--- fesvr/syscall.cc.orig > ++++ fesvr/syscall.cc > +@@ -300,7 +300,7 @@ reg_t syscall_t::sys_getmainvars(reg_t pbuf, reg_t lim > + { > + std::vector<std::string> args = htif->target_args(); > + std::vector<uint64_t> words(args.size() + 3); > +- words[0] = to_le(args.size()); > ++ words[0] = to_le((uint32_t) args.size()); > + words[args.size()+1] = 0; // argv[argc] = NULL > + words[args.size()+2] = 0; // envp[0] = NULL > +
