Hi,
The following diff makes devel/gmp to pass its testsuite on IBT machine.
I bumped REVISION for all subpackages as I am unsure if cxx is affected by asm
changes or not. So in doubt, bump.
The patches adds `endbr64' instruction on amd64 specific code. There was found
by running in loop the testsuite, identify the function where a SIGILL occurs,
read, understand and patch the whole file.
As it is based on testsuite coverage, some faulting cases could be still
present. But it is enough to fully unbreak lang/gcc/8 build (with a new
bootstrap and new libgmp.so file).
Comments or OK ?
--
Sebastien Marie
Index: Makefile
===================================================================
RCS file: /cvs/ports/devel/gmp/Makefile,v
retrieving revision 1.47
diff -u -p -r1.47 Makefile
--- Makefile 25 Apr 2023 09:39:14 -0000 1.47
+++ Makefile 9 Jun 2023 10:31:32 -0000
@@ -2,7 +2,7 @@ COMMENT-main= library for arbitrary prec
COMMENT-cxx= C++ library for arbitrary precision arithmetic
VERSION= 6.2.1
-REVISION-main= 1
+REVISION= 2
DISTNAME= gmp-${VERSION}
MULTI_PACKAGES= -main -cxx
PKGNAME-cxx= gmpxx-${VERSION}
Index: patches/patch-mpn_x86_64_k8_mul_basecase_asm
===================================================================
RCS file: patches/patch-mpn_x86_64_k8_mul_basecase_asm
diff -N patches/patch-mpn_x86_64_k8_mul_basecase_asm
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-mpn_x86_64_k8_mul_basecase_asm 9 Jun 2023 10:31:32
-0000
@@ -0,0 +1,47 @@
+Index: mpn/x86_64/k8/mul_basecase.asm
+--- mpn/x86_64/k8/mul_basecase.asm.orig
++++ mpn/x86_64/k8/mul_basecase.asm
+@@ -335,9 +335,11 @@ C addmul_2 for remaining vp's
+ C adjusted value of n that is reloaded on each iteration
+
+ L(addmul_outer_0):
++ endbr64
+ add $3, un
+ lea 0(%rip), outer_addr
+
++ endbr64
+ mov un, n
+ mov -24(up,un,8), %rax
+ mul v0
+@@ -348,6 +350,7 @@ L(addmul_outer_0):
+ jmp L(addmul_entry_0)
+
+ L(addmul_outer_1):
++ endbr64
+ mov un, n
+ mov (up,un,8), %rax
+ mul v0
+@@ -358,9 +361,11 @@ L(addmul_outer_1):
+ jmp L(addmul_entry_1)
+
+ L(addmul_outer_2):
++ endbr64
+ add $1, un
+ lea 0(%rip), outer_addr
+
++ endbr64
+ mov un, n
+ mov -8(up,un,8), %rax
+ mul v0
+@@ -372,9 +377,11 @@ L(addmul_outer_2):
+ jmp L(addmul_entry_2)
+
+ L(addmul_outer_3):
++ endbr64
+ add $2, un
+ lea 0(%rip), outer_addr
+
++ endbr64
+ mov un, n
+ mov -16(up,un,8), %rax
+ xor R32(w3), R32(w3)
Index: patches/patch-mpn_x86_64_k8_mullo_basecase_asm
===================================================================
RCS file: patches/patch-mpn_x86_64_k8_mullo_basecase_asm
diff -N patches/patch-mpn_x86_64_k8_mullo_basecase_asm
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-mpn_x86_64_k8_mullo_basecase_asm 9 Jun 2023 10:31:32
-0000
@@ -0,0 +1,46 @@
+Index: mpn/x86_64/k8/mullo_basecase.asm
+--- mpn/x86_64/k8/mullo_basecase.asm.orig
++++ mpn/x86_64/k8/mullo_basecase.asm
+@@ -99,12 +99,14 @@ dnl JMPENT( L(2m4), L(tab)) C 10
+ dnl JMPENT( L(3m4), L(tab)) C 11
+ TEXT
+
+-L(1): imul %r8, %rax
++L(1): endbr64
++ imul %r8, %rax
+ mov %rax, (rp)
+ FUNC_EXIT()
+ ret
+
+-L(2): mov 8(vp_param), %r11
++L(2): endbr64
++ mov 8(vp_param), %r11
+ imul %rax, %r11 C u0 x v1
+ mul %r8 C u0 x v0
+ mov %rax, (rp)
+@@ -115,7 +117,8 @@ L(2): mov 8(vp_param), %r11
+ FUNC_EXIT()
+ ret
+
+-L(3): mov 8(vp_param), %r9 C v1
++L(3): endbr64
++ mov 8(vp_param), %r9 C v1
+ mov 16(vp_param), %r11
+ mul %r8 C u0 x v0 -> <r1,r0>
+ mov %rax, (rp) C r0
+@@ -335,6 +338,7 @@ L(mul_2_entry_1):
+
+
+ L(addmul_outer_1):
++ endbr64
+ lea -2(n), j
+ mov -16(up,n,8), %rax
+ mul v0
+@@ -346,6 +350,7 @@ L(addmul_outer_1):
+ jmp L(addmul_entry_1)
+
+ L(addmul_outer_3):
++ endbr64
+ lea 0(n), j
+ mov -16(up,n,8), %rax
+ xor R32(w3), R32(w3)
Index: patches/patch-mpn_x86_64_k8_mulmid_basecase_asm
===================================================================
RCS file: patches/patch-mpn_x86_64_k8_mulmid_basecase_asm
diff -N patches/patch-mpn_x86_64_k8_mulmid_basecase_asm
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-mpn_x86_64_k8_mulmid_basecase_asm 9 Jun 2023 10:31:32
-0000
@@ -0,0 +1,67 @@
+Index: mpn/x86_64/k8/mulmid_basecase.asm
+--- mpn/x86_64/k8/mulmid_basecase.asm.orig
++++ mpn/x86_64/k8/mulmid_basecase.asm
+@@ -329,6 +329,7 @@ C addmul_2 for remaining vp's
+
+ ALIGN(16)
+ L(addmul_prologue_0):
++ endbr64
+ mov -8(up,n,8), %rax
+ mul v1
+ mov %rax, w1
+@@ -338,6 +339,7 @@ L(addmul_prologue_0):
+
+ ALIGN(16)
+ L(addmul_prologue_1):
++ endbr64
+ mov 16(up,n,8), %rax
+ mul v1
+ mov %rax, w0
+@@ -348,6 +350,7 @@ L(addmul_prologue_1):
+
+ ALIGN(16)
+ L(addmul_prologue_2):
++ endbr64
+ mov 8(up,n,8), %rax
+ mul v1
+ mov %rax, w3
+@@ -357,6 +360,7 @@ L(addmul_prologue_2):
+
+ ALIGN(16)
+ L(addmul_prologue_3):
++ endbr64
+ mov (up,n,8), %rax
+ mul v1
+ mov %rax, w2
+@@ -471,6 +475,7 @@ L(diag_prologue_0):
+ mov vp, vp_inner
+ mov vn, n
+ lea 0(%rip), outer_addr
++ endbr64
+ mov -8(up,n,8), %rax
+ jmp L(diag_entry_0)
+
+@@ -480,6 +485,7 @@ L(diag_prologue_1):
+ add $3, vn
+ mov vn, n
+ lea 0(%rip), outer_addr
++ endbr64
+ mov -8(vp_inner), %rax
+ jmp L(diag_entry_1)
+
+@@ -489,6 +495,7 @@ L(diag_prologue_2):
+ add $2, vn
+ mov vn, n
+ lea 0(%rip), outer_addr
++ endbr64
+ mov 16(vp_inner), %rax
+ jmp L(diag_entry_2)
+
+@@ -507,6 +514,7 @@ L(diag_entry_0):
+ adc %rdx, w1
+ adc $0, w2
+ L(diag_entry_3):
++ endbr64
+ mov -16(up,n,8), %rax
+ mulq 8(vp_inner)
+ add %rax, w0
Index: patches/patch-mpn_x86_64_k8_redc_1_asm
===================================================================
RCS file: patches/patch-mpn_x86_64_k8_redc_1_asm
diff -N patches/patch-mpn_x86_64_k8_redc_1_asm
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-mpn_x86_64_k8_redc_1_asm 9 Jun 2023 10:31:32 -0000
@@ -0,0 +1,73 @@
+Index: mpn/x86_64/k8/redc_1.asm
+--- mpn/x86_64/k8/redc_1.asm.orig
++++ mpn/x86_64/k8/redc_1.asm
+@@ -125,7 +125,8 @@ L(tab): JMPENT( L(0), L(tab))
+ TEXT
+
+ ALIGN(16)
+-L(1): mov (mp_param), %rax
++L(1): endbr64
++ mov (mp_param), %rax
+ mul q0
+ add 8(up), %rax
+ adc 16(up), %rdx
+@@ -136,7 +137,8 @@ L(1): mov (mp_param), %rax
+
+
+ ALIGN(16)
+-L(2): mov (mp_param), %rax
++L(2): endbr64
++ mov (mp_param), %rax
+ mul q0
+ xor R32(%r14), R32(%r14)
+ mov %rax, %r10
+@@ -171,7 +173,8 @@ L(2): mov (mp_param), %rax
+ jmp L(ret)
+
+
+-L(3): mov (mp_param), %rax
++L(3): endbr64
++ mov (mp_param), %rax
+ mul q0
+ mov %rax, %rbx
+ mov %rdx, %r10
+@@ -249,7 +252,8 @@ L(3): mov (mp_param), %rax
+
+ ALIGN(16)
+ L(2m4):
+-L(lo2): mov (mp,nneg,8), %rax
++L(lo2): endbr64
++ mov (mp,nneg,8), %rax
+ mul q0
+ xor R32(%r14), R32(%r14)
+ xor R32(%rbx), R32(%rbx)
+@@ -325,7 +329,8 @@ L(le2): add %r10, (up)
+
+ ALIGN(16)
+ L(1m4):
+-L(lo1): mov (mp,nneg,8), %rax
++L(lo1): endbr64
++ mov (mp,nneg,8), %rax
+ xor %r9, %r9
+ xor R32(%rbx), R32(%rbx)
+ mul q0
+@@ -399,7 +404,8 @@ L(le1): add %r10, (up)
+ ALIGN(16)
+ L(0):
+ L(0m4):
+-L(lo0): mov (mp,nneg,8), %rax
++L(lo0): endbr64
++ mov (mp,nneg,8), %rax
+ mov nneg, i
+ mul q0
+ xor R32(%r10), R32(%r10)
+@@ -464,7 +470,8 @@ L(le0): add %r10, (up)
+
+ ALIGN(16)
+ L(3m4):
+-L(lo3): mov (mp,nneg,8), %rax
++L(lo3): endbr64
++ mov (mp,nneg,8), %rax
+ mul q0
+ mov %rax, %rbx
+ mov %rdx, %r10
Index: patches/patch-mpn_x86_64_k8_sqr_basecase_asm
===================================================================
RCS file: patches/patch-mpn_x86_64_k8_sqr_basecase_asm
diff -N patches/patch-mpn_x86_64_k8_sqr_basecase_asm
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-mpn_x86_64_k8_sqr_basecase_asm 9 Jun 2023 10:31:32
-0000
@@ -0,0 +1,75 @@
+Index: mpn/x86_64/k8/sqr_basecase.asm
+--- mpn/x86_64/k8/sqr_basecase.asm.orig
++++ mpn/x86_64/k8/sqr_basecase.asm
+@@ -131,7 +131,8 @@ L(tab): JMPENT( L(4), L(tab))
+ JMPENT( L(3m4), L(tab))
+ TEXT
+
+-L(1): mov (up), %rax
++L(1): endbr64
++ mov (up), %rax
+ mul %rax
+ add $40, %rsp
+ mov %rax, (rp)
+@@ -139,7 +140,8 @@ L(1): mov (up), %rax
+ FUNC_EXIT()
+ ret
+
+-L(2): mov (up), %rax
++L(2): endbr64
++ mov (up), %rax
+ mov %rax, %r8
+ mul %rax
+ mov 8(up), %r11
+@@ -165,7 +167,8 @@ L(2): mov (up), %rax
+ FUNC_EXIT()
+ ret
+
+-L(3): mov (up), %rax
++L(3): endbr64
++ mov (up), %rax
+ mov %rax, %r10
+ mul %rax
+ mov 8(up), %r11
+@@ -210,7 +213,8 @@ L(3): mov (up), %rax
+ FUNC_EXIT()
+ ret
+
+-L(4): mov (up), %rax
++L(4): endbr64
++ mov (up), %rax
+ mov %rax, %r11
+ mul %rax
+ mov 8(up), %rbx
+@@ -282,6 +286,7 @@ L(4): mov (up), %rax
+
+
+ L(0m4):
++ endbr64
+ lea -16(rp,n,8), tp C point tp in middle of result operand
+ mov (up), v0
+ mov 8(up), %rax
+@@ -340,6 +345,7 @@ L(L3): xor R32(w1), R32(w1)
+
+
+ L(1m4):
++ endbr64
+ lea 8(rp,n,8), tp C point tp in middle of result operand
+ mov (up), v0 C u0
+ mov 8(up), %rax C u1
+@@ -418,6 +424,7 @@ L(m2x): mov (up,j,8), %rax
+
+
+ L(2m4):
++ endbr64
+ lea -16(rp,n,8), tp C point tp in middle of result operand
+ mov (up), v0
+ mov 8(up), %rax
+@@ -475,6 +482,7 @@ L(L1): xor R32(w0), R32(w0)
+
+
+ L(3m4):
++ endbr64
+ lea 8(rp,n,8), tp C point tp in middle of result operand
+ mov (up), v0 C u0
+ mov 8(up), %rax C u1
Index: patches/patch-mpn_x86_64_mod_34lsub1_asm
===================================================================
RCS file: patches/patch-mpn_x86_64_mod_34lsub1_asm
diff -N patches/patch-mpn_x86_64_mod_34lsub1_asm
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-mpn_x86_64_mod_34lsub1_asm 9 Jun 2023 10:31:32 -0000
@@ -0,0 +1,68 @@
+Index: mpn/x86_64/mod_34lsub1.asm
+--- mpn/x86_64/mod_34lsub1.asm.orig
++++ mpn/x86_64/mod_34lsub1.asm
+@@ -145,46 +145,55 @@ L(tab): JMPENT( L(0), L(tab))
+ JMPENT( L(8), L(tab))
+ TEXT
+
+-L(6): add (ap), %rax
++L(6): endbr64
++ add (ap), %rax
+ adc 8(ap), %rcx
+ adc 16(ap), %rdx
+ adc $0, %r9
+ add $24, ap
+-L(3): add (ap), %rax
++L(3): endbr64
++ add (ap), %rax
+ adc 8(ap), %rcx
+ adc 16(ap), %rdx
+ jmp L(cj1)
+
+-L(7): add (ap), %rax
++L(7): endbr64
++ add (ap), %rax
+ adc 8(ap), %rcx
+ adc 16(ap), %rdx
+ adc $0, %r9
+ add $24, ap
+-L(4): add (ap), %rax
++L(4): endbr64
++ add (ap), %rax
+ adc 8(ap), %rcx
+ adc 16(ap), %rdx
+ adc $0, %r9
+ add $24, ap
+-L(1): add (ap), %rax
++L(1): endbr64
++ add (ap), %rax
+ adc $0, %rcx
+ jmp L(cj2)
+
+-L(8): add (ap), %rax
++L(8): endbr64
++ add (ap), %rax
+ adc 8(ap), %rcx
+ adc 16(ap), %rdx
+ adc $0, %r9
+ add $24, ap
+-L(5): add (ap), %rax
++L(5): endbr64
++ add (ap), %rax
+ adc 8(ap), %rcx
+ adc 16(ap), %rdx
+ adc $0, %r9
+ add $24, ap
+-L(2): add (ap), %rax
++L(2): endbr64
++ add (ap), %rax
+ adc 8(ap), %rcx
+
+ L(cj2): adc $0, %rdx
+ L(cj1): adc $0, %r9
+-L(0): add %r9, %rax
++L(0): endbr64
++ add %r9, %rax
+ adc $0, %rcx
+ adc $0, %rdx
+ adc $0, %rax
Index: patches/patch-mpn_x86_64_x86_64-defs_m4
===================================================================
RCS file: patches/patch-mpn_x86_64_x86_64-defs_m4
diff -N patches/patch-mpn_x86_64_x86_64-defs_m4
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-mpn_x86_64_x86_64-defs_m4 9 Jun 2023 10:31:32 -0000
@@ -0,0 +1,11 @@
+Index: mpn/x86_64/x86_64-defs.m4
+--- mpn/x86_64/x86_64-defs.m4.orig
++++ mpn/x86_64/x86_64-defs.m4
+@@ -95,6 +95,7 @@ m4_assert_numargs(1)
+ TYPE($1,`function')
+ COFF_TYPE($1)
+ $1:
++ endbr64
+ ')
+
+
