Hello!
Here is update for xschem 2.9.2 and fix wish setting line.
All ather tcl files are purely procedure files.
Best regards,
Hannu Vuolasaho
Index: Makefile
===================================================================
RCS file: /cvs/ports/cad/xschem/Makefile,v
retrieving revision 1.3
diff -u -p -u -r1.3 Makefile
--- Makefile 12 Jul 2019 20:43:46 -0000 1.3
+++ Makefile 18 Sep 2019 17:59:09 -0000
@@ -2,7 +2,7 @@
COMMENT = hierarchical schematic capture program
-DISTNAME = xschem-2.8.2
+DISTNAME = xschem-2.9.2
CATEGORIES = cad
@@ -41,6 +41,6 @@ FAKE_FLAGS = MANDIR="${DESTDIR}${PREFIX
NO_TEST = Yes
pre-configure:
- ${MODTCL_WISH_ADJ} ${WRKSRC}/src/xschem.tcl ${WRKSRC}/utile/utile.tcl
+ ${MODTCL_WISH_ADJ} ${WRKSRC}/src/utile/utile.tcl
.include <bsd.port.mk>
Index: distinfo
===================================================================
RCS file: /cvs/ports/cad/xschem/distinfo,v
retrieving revision 1.2
diff -u -p -u -r1.2 distinfo
--- distinfo 12 Feb 2019 17:17:24 -0000 1.2
+++ distinfo 18 Sep 2019 17:59:09 -0000
@@ -1,2 +1,2 @@
-SHA256 (xschem-2.8.2.tar.gz) = NDcxy6DUgzJorKPgzq3pmeO0uVDs4MeLWUIomgbSCgI=
-SIZE (xschem-2.8.2.tar.gz) = 3741517
+SHA256 (xschem-2.9.2.tar.gz) = CruN0gAFNqGT5Q7I5dDCx/APxFa5NBwRNWj59vo+BYU=
+SIZE (xschem-2.9.2.tar.gz) = 3751442
Index: pkg/PLIST
===================================================================
RCS file: /cvs/ports/cad/xschem/pkg/PLIST,v
retrieving revision 1.2
diff -u -p -u -r1.2 PLIST
--- pkg/PLIST 12 Feb 2019 17:17:24 -0000 1.2
+++ pkg/PLIST 18 Sep 2019 17:59:09 -0000
@@ -182,6 +182,7 @@ share/doc/xschem/xschem_man/xschem_ngspi
share/doc/xschem/xschem_man/xschem_polygons.png
share/doc/xschem/xschem_man/xschem_properties.html
share/doc/xschem/xschem_man/xschem_rectangles.png
+share/doc/xschem/xschem_man/xschem_remote.html
share/doc/xschem/xschem_man/xschem_saveas.png
share/doc/xschem/xschem_man/xschem_symbols.png
share/doc/xschem/xschem_man/xschem_texts.png
@@ -266,8 +267,10 @@ share/examples/xschem/test_ne555.sym
share/examples/xschem/xnor.sym
share/xschem/
share/xschem/break.awk
+share/xschem/change_index.tcl
share/xschem/convert_to_verilog2001.awk
share/xschem/flatten.awk
+share/xschem/hspice_backannotate.tcl
share/xschem/keys.help
share/xschem/make_sym.awk
share/xschem/order_labels.awk
@@ -364,6 +367,7 @@ share/xschem/xschem_library/devices/vcvs
share/xschem/xschem_library/devices/vdd.sym
share/xschem/xschem_library/devices/verilog_delay.sch
share/xschem/xschem_library/devices/verilog_delay.sym
+share/xschem/xschem_library/devices/verilog_preprocessor.sym
share/xschem/xschem_library/devices/verilog_timescale.sym
share/xschem/xschem_library/devices/vsource.sym
share/xschem/xschem_library/devices/vsource_arith.sym