For ports/devel/llvm, I would like to bring the most recent changes
from base-clang. This affects Mips and PowerPC. Is this OK?
Mips gets, "Use a distinct trap code with retguard on mips64."
(I use PowerPC and know little about Mips.)
PowerPC gets,
- Set max atomic size for AtomicExpandPass.
- For OpenBSD/powerpc64: switch to ELFv2, use _mcount profiling, and
add our OpenBSD specific defines.
- Optimize away the frame pointer.
Upstream LLVM already optimizes away the frame pointer on PowerPC, but
doesn't have the other changes. At least one patch in tools/clang
affects both clang and liblldb, so I bump both REVISION-main and
REVISION-lldb. --George
Index: Makefile
===================================================================
RCS file: /cvs/ports/devel/llvm/Makefile,v
retrieving revision 1.252
diff -u -p -r1.252 Makefile
--- Makefile 19 May 2020 10:05:47 -0000 1.252
+++ Makefile 13 Jun 2020 03:37:24 -0000
@@ -18,9 +18,9 @@ PKGSPEC-main = llvm-=${LLVM_V}
PKGNAME-main = llvm-${LLVM_V}
PKGNAME-python = py3-llvm-${LLVM_V}
PKGNAME-lldb = lldb-${LLVM_V}
-REVISION-main = 13
+REVISION-main = 14
REVISION-python = 1
-REVISION-lldb = 2
+REVISION-lldb = 3
CATEGORIES = devel
Index: patches/patch-lib_Target_Mips_MipsReturnProtectorLowering_cpp
===================================================================
RCS file:
/cvs/ports/devel/llvm/patches/patch-lib_Target_Mips_MipsReturnProtectorLowering_cpp,v
retrieving revision 1.1
diff -u -p -r1.1 patch-lib_Target_Mips_MipsReturnProtectorLowering_cpp
--- patches/patch-lib_Target_Mips_MipsReturnProtectorLowering_cpp 7 Jan
2020 22:59:43 -0000 1.1
+++ patches/patch-lib_Target_Mips_MipsReturnProtectorLowering_cpp 13 Jun
2020 03:37:24 -0000
@@ -5,7 +5,7 @@ Add retguard for octeon/mips64.
Index: lib/Target/Mips/MipsReturnProtectorLowering.cpp
--- lib/Target/Mips/MipsReturnProtectorLowering.cpp.orig
+++ lib/Target/Mips/MipsReturnProtectorLowering.cpp
-@@ -0,0 +1,272 @@
+@@ -0,0 +1,273 @@
+//===-- MipsReturnProtectorLowering.cpp --------------------------------===//
+//
+// The LLVM Compiler Infrastructure
@@ -119,6 +119,7 @@ Index: lib/Target/Mips/MipsReturnProtect
+ unsigned REG = MF.getFrameInfo().getReturnProtectorRegister();
+
+ const GlobalValue *FName = &MF.getFunction();
++ const unsigned TRAPCODE = 0x52;
+
+ // Select some scratch registers
+ unsigned TempReg1 = Mips::T7_64;
@@ -177,7 +178,7 @@ Index: lib/Target/Mips/MipsReturnProtect
+ BuildMI(MBB, MI, MBBDL, TII->get(Mips::TNE))
+ .addReg(TempReg1)
+ .addReg(REG)
-+ .addImm(0);
++ .addImm(TRAPCODE);
+ // Emit the BAL target symbol from above
+ BuildMI(MBB, MI, MBBDL, TII->get(Mips::RETGUARD_EMIT_SYMBOL))
+ .addSym(BALTarget);
@@ -204,7 +205,7 @@ Index: lib/Target/Mips/MipsReturnProtect
+ BuildMI(MBB, MI, MBBDL, TII->get(Mips::TNE))
+ .addReg(TempReg1)
+ .addReg(REG)
-+ .addImm(0);
++ .addImm(TRAPCODE);
+ }
+}
+
Index: patches/patch-lib_Target_PowerPC_PPCISelLowering_cpp
===================================================================
RCS file:
/cvs/ports/devel/llvm/patches/patch-lib_Target_PowerPC_PPCISelLowering_cpp,v
retrieving revision 1.6
diff -u -p -r1.6 patch-lib_Target_PowerPC_PPCISelLowering_cpp
--- patches/patch-lib_Target_PowerPC_PPCISelLowering_cpp 7 Jul 2019
14:04:07 -0000 1.6
+++ patches/patch-lib_Target_PowerPC_PPCISelLowering_cpp 13 Jun 2020
03:37:24 -0000
@@ -1,5 +1,8 @@
$OpenBSD: patch-lib_Target_PowerPC_PPCISelLowering_cpp,v 1.6 2019/07/07
14:04:07 jca Exp $
+Set max atomic size for PowerPC, so AtomicExpandPass changes some
+8-byte atomic ops into libcalls.
+
When generating code for OpenBSD/powerpc, avoid unaligned floating-point
load and store instructions. The vast majority of PowerPC CPUs that
OpenBSD runs on don't implement those and will generate an alignment
@@ -10,10 +13,23 @@ compiler generate code that only uses al
Index: lib/Target/PowerPC/PPCISelLowering.cpp
--- lib/Target/PowerPC/PPCISelLowering.cpp.orig
+++ lib/Target/PowerPC/PPCISelLowering.cpp
-@@ -14204,6 +14204,14 @@ bool PPCTargetLowering::allowsMisalignedMemoryAccesses
+@@ -1034,7 +1034,10 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMa
+
+ setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, isPPC64 ? Legal :
Custom);
+
+- if (!isPPC64) {
++ if (isPPC64)
++ setMaxAtomicSizeInBitsSupported(64);
++ else {
++ setMaxAtomicSizeInBitsSupported(32);
+ setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand);
+ setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Expand);
+ }
+@@ -14203,6 +14206,14 @@ bool PPCTargetLowering::allowsMisalignedMemoryAccesses
+
if (VT == MVT::ppcf128)
return false;
-
++
+ if (Subtarget.isTargetOpenBSD()) {
+ // Traditional PowerPC does not support unaligned memory access
+ // for floating-point and the OpenBSD kernel does not emulate
@@ -21,7 +37,6 @@ Index: lib/Target/PowerPC/PPCISelLowerin
+ if (VT == MVT::f32 || VT == MVT::f64)
+ return false;
+ }
-+
+
if (Fast)
*Fast = true;
-
Index: patches/patch-lib_Target_PowerPC_PPCTargetMachine_cpp
===================================================================
RCS file: patches/patch-lib_Target_PowerPC_PPCTargetMachine_cpp
diff -N patches/patch-lib_Target_PowerPC_PPCTargetMachine_cpp
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-lib_Target_PowerPC_PPCTargetMachine_cpp 13 Jun 2020
03:37:24 -0000
@@ -0,0 +1,16 @@
+$OpenBSD$
+
+Switch Powerpc64 Big Endian to ELFv2 on OpenBSD.
+
+Index: lib/Target/PowerPC/PPCTargetMachine.cpp
+--- lib/Target/PowerPC/PPCTargetMachine.cpp.orig
++++ lib/Target/PowerPC/PPCTargetMachine.cpp
+@@ -199,6 +199,8 @@ static PPCTargetMachine::PPCABI computeTargetABI(const
+ case Triple::ppc64le:
+ return PPCTargetMachine::PPC_ABI_ELFv2;
+ case Triple::ppc64:
++ if (TT.isOSOpenBSD())
++ return PPCTargetMachine::PPC_ABI_ELFv2;
+ return PPCTargetMachine::PPC_ABI_ELFv1;
+ default:
+ return PPCTargetMachine::PPC_ABI_UNKNOWN;
Index: patches/patch-tools_clang_lib_Basic_Targets_OSTargets_h
===================================================================
RCS file: patches/patch-tools_clang_lib_Basic_Targets_OSTargets_h
diff -N patches/patch-tools_clang_lib_Basic_Targets_OSTargets_h
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-tools_clang_lib_Basic_Targets_OSTargets_h 13 Jun 2020
03:37:24 -0000
@@ -0,0 +1,15 @@
+$OpenBSD$
+
+Powerpc64 should use the same _mcount profiling as powerpc 32bit.
+
+Index: tools/clang/lib/Basic/Targets/OSTargets.h
+--- tools/clang/lib/Basic/Targets/OSTargets.h.orig
++++ tools/clang/lib/Basic/Targets/OSTargets.h
+@@ -446,6 +446,7 @@ class LLVM_LIBRARY_VISIBILITY OpenBSDTargetInfo : publ
+ case llvm::Triple::mips64:
+ case llvm::Triple::mips64el:
+ case llvm::Triple::ppc:
++ case llvm::Triple::ppc64:
+ case llvm::Triple::sparcv9:
+ this->MCountName = "_mcount";
+ break;
Index: patches/patch-tools_clang_lib_Basic_Targets_cpp
===================================================================
RCS file: patches/patch-tools_clang_lib_Basic_Targets_cpp
diff -N patches/patch-tools_clang_lib_Basic_Targets_cpp
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ patches/patch-tools_clang_lib_Basic_Targets_cpp 13 Jun 2020 03:37:24
-0000
@@ -0,0 +1,25 @@
+$OpenBSD$
+
+Add our OpenBSD specific defines on PowerPC64 targets.
+
+Index: tools/clang/lib/Basic/Targets.cpp
+--- tools/clang/lib/Basic/Targets.cpp.orig
++++ tools/clang/lib/Basic/Targets.cpp
+@@ -349,6 +349,8 @@ TargetInfo *AllocateTarget(const llvm::Triple &Triple,
+ return new FreeBSDTargetInfo<PPC64TargetInfo>(Triple, Opts);
+ case llvm::Triple::NetBSD:
+ return new NetBSDTargetInfo<PPC64TargetInfo>(Triple, Opts);
++ case llvm::Triple::OpenBSD:
++ return new OpenBSDTargetInfo<PPC64TargetInfo>(Triple, Opts);
+ default:
+ return new PPC64TargetInfo(Triple, Opts);
+ }
+@@ -359,6 +361,8 @@ TargetInfo *AllocateTarget(const llvm::Triple &Triple,
+ return new LinuxTargetInfo<PPC64TargetInfo>(Triple, Opts);
+ case llvm::Triple::NetBSD:
+ return new NetBSDTargetInfo<PPC64TargetInfo>(Triple, Opts);
++ case llvm::Triple::OpenBSD:
++ return new OpenBSDTargetInfo<PPC64TargetInfo>(Triple, Opts);
+ default:
+ return new PPC64TargetInfo(Triple, Opts);
+ }
Index: patches/patch-tools_clang_lib_Driver_ToolChains_Clang_cpp
===================================================================
RCS file:
/cvs/ports/devel/llvm/patches/patch-tools_clang_lib_Driver_ToolChains_Clang_cpp,v
retrieving revision 1.12
diff -u -p -r1.12 patch-tools_clang_lib_Driver_ToolChains_Clang_cpp
--- patches/patch-tools_clang_lib_Driver_ToolChains_Clang_cpp 5 Mar 2020
00:50:00 -0000 1.12
+++ patches/patch-tools_clang_lib_Driver_ToolChains_Clang_cpp 13 Jun 2020
03:37:24 -0000
@@ -1,5 +1,6 @@
$OpenBSD: patch-tools_clang_lib_Driver_ToolChains_Clang_cpp,v 1.12 2020/03/05
00:50:00 gkoehler Exp $
+- Optimize away the frame pointer on powerpc.
- Add -msvr4-struct-return for powerpc.
- Make LLVM create strict aligned code for OpenBSD/arm64.
- Disable -fstrict-aliasing per default on OpenBSD.
@@ -34,7 +35,30 @@ $OpenBSD: patch-tools_clang_lib_Driver_T
Index: tools/clang/lib/Driver/ToolChains/Clang.cpp
--- tools/clang/lib/Driver/ToolChains/Clang.cpp.orig
+++ tools/clang/lib/Driver/ToolChains/Clang.cpp
-@@ -3870,6 +3870,19 @@ void Clang::ConstructJob(Compilation &C, const JobActi
+@@ -523,8 +523,12 @@ static bool useFramePointerForTargetByDefault(const Ar
+ // XCore never wants frame pointers, regardless of OS.
+ // WebAssembly never wants frame pointers.
+ return false;
++ case llvm::Triple::ppc:
++ case llvm::Triple::ppc64:
++ case llvm::Triple::ppc64le:
+ case llvm::Triple::riscv32:
+ case llvm::Triple::riscv64:
++ // PowerPC's frame pointer is often an extra copy of the stack pointer.
+ return !areOptimizationsEnabled(Args);
+ default:
+ break;
+@@ -542,9 +546,6 @@ static bool useFramePointerForTargetByDefault(const Ar
+ case llvm::Triple::mips64el:
+ case llvm::Triple::mips:
+ case llvm::Triple::mipsel:
+- case llvm::Triple::ppc:
+- case llvm::Triple::ppc64:
+- case llvm::Triple::ppc64le:
+ case llvm::Triple::systemz:
+ case llvm::Triple::x86:
+ case llvm::Triple::x86_64:
+@@ -3870,6 +3871,19 @@ void Clang::ConstructJob(Compilation &C, const JobActi
CmdArgs.push_back(A->getValue());
}
@@ -54,7 +78,7 @@ Index: tools/clang/lib/Driver/ToolChains
if (Arg *A = Args.getLastArg(options::OPT_fpcc_struct_return,
options::OPT_freg_struct_return)) {
if (TC.getArch() != llvm::Triple::x86) {
-@@ -3899,9 +3912,12 @@ void Clang::ConstructJob(Compilation &C, const JobActi
+@@ -3899,9 +3913,12 @@ void Clang::ConstructJob(Compilation &C, const JobActi
OFastEnabled ? options::OPT_Ofast : options::OPT_fstrict_aliasing;
// We turn strict aliasing off by default if we're in CL mode, since MSVC
// doesn't do any TBAA.
@@ -69,7 +93,7 @@ Index: tools/clang/lib/Driver/ToolChains
CmdArgs.push_back("-relaxed-aliasing");
if (!Args.hasFlag(options::OPT_fstruct_path_tbaa,
options::OPT_fno_struct_path_tbaa))
-@@ -4527,7 +4543,8 @@ void Clang::ConstructJob(Compilation &C, const JobActi
+@@ -4527,7 +4544,8 @@ void Clang::ConstructJob(Compilation &C, const JobActi
options::OPT_fno_strict_overflow)) {
if (A->getOption().matches(options::OPT_fno_strict_overflow))
CmdArgs.push_back("-fwrapv");
@@ -79,7 +103,7 @@ Index: tools/clang/lib/Driver/ToolChains
if (Arg *A = Args.getLastArg(options::OPT_freroll_loops,
options::OPT_fno_reroll_loops))
-@@ -4544,9 +4561,46 @@ void Clang::ConstructJob(Compilation &C, const JobActi
+@@ -4544,9 +4562,46 @@ void Clang::ConstructJob(Compilation &C, const JobActi
false))
CmdArgs.push_back(Args.MakeArgString("-mspeculative-load-hardening"));
@@ -127,7 +151,7 @@ Index: tools/clang/lib/Driver/ToolChains
// Translate -mstackrealign
if (Args.hasFlag(options::OPT_mstackrealign, options::OPT_mno_stackrealign,
false))
-@@ -5029,6 +5083,18 @@ void Clang::ConstructJob(Compilation &C, const JobActi
+@@ -5029,6 +5084,18 @@ void Clang::ConstructJob(Compilation &C, const JobActi
options::OPT_fno_rewrite_imports, false);
if (RewriteImports)
CmdArgs.push_back("-frewrite-imports");
