Hi. I have found a small error in operation with mmu arm. L2 page tables
represents 1 MB of virtual memory - not 4 MB. This patch uses 4 coarse page
tables instead of 1 fine page table. With this patch integrator works in qemu
with mmu.
diff -Naur prex-0.9.0_orig/bsp/hal/arm/arch/locore.S
prex-0.9.0/bsp/hal/arm/arch/locore.S
--- prex-0.9.0_orig/bsp/hal/arm/arch/locore.S 2009-07-29 09:52:52.000000000
+0000
+++ prex-0.9.0/bsp/hal/arm/arch/locore.S 2010-01-06 09:19:02.000000000
+0000
@@ -137,7 +137,13 @@
mov r1, #(BOOT_PGD_PHYS + 0x2000) /* Set PTE0 address in pgd */
mov r0, #BOOT_PTE0_PHYS /* WBUF/CACHE/SYSTEM attribute */
- orr r0, r0, #0x03
+ orr r0, r0, #0x11
+ str r0, [r1], #4
+ add r0, r0, #0x400
+ str r0, [r1], #4
+ add r0, r0, #0x400
+ str r0, [r1], #4
+ add r0, r0, #0x400
str r0, [r1]
mov r1, #BOOT_PTE0_PHYS /* Fill boot page table entry */
@@ -156,7 +162,7 @@
*/
mov r1, #BOOT_PGD_PHYS /* Set PTE0 address in pgd */
mov r0, #BOOT_PTE0_PHYS /* WBUF/CACHE/SYSTEM attribute */
- orr r0, r0, #0x03
+ orr r0, r0, #0x11
str r0, [r1]
mov r0, #0
diff -Naur prex-0.9.0_orig/bsp/hal/arm/include/mmu.h
prex-0.9.0/bsp/hal/arm/include/mmu.h
--- prex-0.9.0_orig/bsp/hal/arm/include/mmu.h 2009-10-01 12:28:53.000000000
+0000
+++ prex-0.9.0/bsp/hal/arm/include/mmu.h 2010-01-06 09:20:24.000000000
+0000
@@ -36,13 +36,13 @@
typedef uint32_t *pte_t; /* page table entry */
#define L1TBL_SIZE 0x4000
-#define L2TBL_SIZE 0x1000
+#define L2TBL_SIZE 0x400
/*
* Page directory entry (L1)
*/
-#define PDE_PRESENT 0x00000003
-#define PDE_ADDRESS 0xfffff000
+#define PDE_PRESENT 0x00000011
+#define PDE_ADDRESS 0xfffffc00
/*
* Page table entry (L2)
Alexander
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