Hi
I read all the comments on the list, but comment only on a few.
Here is one.
Mr Lomax pointed out an problem with not running ERC. I don't think
his comments were "strong enough". From comments in this group, I gather

that a large share of the users here are "engineers also doing pcb's",
not
"PCB Designers". This would generally indicate that they have done the
schemactic, may or may not have done simulation, and then done the pcb.
If so, they may feel reasonably sure of the complete netlist.
    If, however, the "PCB Designer" receives a schemactic from another
individual, by all means run that ERC. you have no way of knowing what
is
in the mind of the other individual. AND no way of knowing how complete
his "job" is.
As example, I just did a board for an outside engineer, ready to go,
just
place and autoroute. " let's try to be done in 40 hours. "  It took 25
hours
to make his netlist come out right. A proper ERC would have caught this
for the engineer. And saved his "face". ( proper body part )

Bob Fearon

        PS  With today's speed of computers, it just take a minute.



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