For some logic device families the input current is much smaller in the high
state than in the low state .

Best Regards,
Matt Tudor , MSEE
Elmar Technologies
http://personal.lig.bellsouth.net/~mariusrf          consulting
http://www.rfdatacorp.com           spread spectrum radio telemetry

-----Original Message-----
From: Mike Reagan <[EMAIL PROTECTED]>
To: Protel EDA Forum <[EMAIL PROTECTED]>
Date: Wednesday, March 28, 2001 6:41 PM
Subject: Re: [PEDA] OT: Unused CMOS inputs (was: Reference)


>I believe the advantage of  tying the inputs to Vdd is so the device will
>consumes less power.    I would have review a mfg data sheet to
substantiate
>my claims here.
>
>
>Mike Reagan
>EDSI
>----- Original Message -----
>From: Dwight Harm <[EMAIL PROTECTED]>
>To: 'Protel EDA Forum' <[EMAIL PROTECTED]>
>Sent: Wednesday, March 28, 2001 6:08 PM
>Subject: [PEDA] OT: Unused CMOS inputs (was: Reference)
>
>
>> Is there a reason to prefer Vdd over GND?  The spec sheets often just say
>> "tied high or low...", and my knowledge of theory is too weak to even
>guess
>> at an answer. :)


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