Actually, I have sometimes daisy chained unused sections of a
HC14 or HC04 since the pins in question are adjacent and the
lengths of the nets are minimized. The first in the chain
connects to the nearest of Vcc and GND.

If I recall correctly, TTL gates required a series resistor (I
don't know why), LSTTL did not but both had to be pulled high
because when pulled low they sourced appreciable current. Since
CMOS the input behaviour has been independent of the input logic
state. 
If you want to be able to use a spare gate or inverter in
modifying a board, you could perhaps just make sure that the
track to the input can be cut readily. If you daisy chain
sections you can readily pull off a non-inverting buffer from 2
spare sections by just cutting the track to the second last
inverter in the chain.

Bagotronix Tech Support wrote:
> 
> I tie unused pins to VCC or GND depending on which is the easiest net to
> reach for that given pin.  For example, if I am routing traces for a 74HC14
> hex inverter, and I don't use 5 of the inverters, I tie the inputs of the
> unused gates on the pin 1 side of the chip to GND, and the inputs of unused
> gates on the pin 14 side of the chip to VCC.  The way I route my power
> buses, the GND track is under the pin 1 side of the chip, and the VCC is
> under the pin 14 side of the chip.  Electrically, there is no reason I know
> of to choose VCC over GND for CMOS inputs.  There is a reason for TTL
> inputs - they are biased high, so connecting to VCC will give slightly less
> current draw.

-- 

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